• 한국정보전자통신기술학회논문지
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• 제6권3호
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• pp.168-173
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• 2013

본 연구는 IGBT(Insulated Gate Bipolar Transistor)의 전기적 특성을 향상시키기 위해 새로운 구조의 IGBT를 제안하였다. 첫 번째 구조는 기존 IGBT 구조의 P-베이스 영역 우측 부분에 N+영역을 추가한 방법으로 기존 구조에 비해 빠른 Turn-off 시간과 낮은 전도 손실을 갖는 구조이다. 또한, 두 번째 구조는 게이트 우측 하단에 P+를 형성함으로써 Latching 전류를 향상시킨 구조이다. 시뮬레이션 결과 제안된 첫 번째 구조는 빠른 Turn-off 시간(3.4us), 낮은 순방향 전압강하(3.08V)의 특성을 보였으며, 두 번째 구조는 높은 Latching 전류(369A/?? ) 특성을 보였다. 따라서 본 논문은 제안된 두 가지의 구조를 하나로 결합한 구조로써 기존 IGBT보다 향상된 특성을 시뮬레이션을 통하여 확인하였다.

• 한국안전학회지
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• 제34권5호
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• pp.31-36
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• 2019

This study made a testing device to evaluate the distribution board management system. Power was supplied to the testing device using a loading-back method and the voltage applied to it was 440 V at the same turn ratio. When the human body electric shock current is 30 mA, the breaking time is set to be less than 240 ms while 30~45 mA current is flowing. The test result shows that in the case of the R-phase it was measured to be 5.19 Hz (193 ms). And the S-phase and T-phase were perfectly cut off at 5.39 Hz (186 ms) and 5.71 Hz (175 ms), respectively. When the human body electric shock current is 60mA, the breaking time is set to be less than 120 ms while 45~75 mA current is flowing. The test result shows that the R-phase, S-phase, and T-phase were accurately cut off at 8.39 Hz (11 ms), 8.87Hz (113 ms) and 9.69 Hz (103 ms), respectively. When the human body electric shock current is 90 mA, the breaking time is set to be less than 48 ms while 75 mA current is flowing. The test result shows that the R-phase, S-phase, and T-phase were accurately cut off at 19.8 Hz (50.4 ms), 16.9 Hz (59.2 ms), and 17.9 Hz (56.0 ms), respectively. That is, the developed testing device satisfied all the requirements of the distribution board evaluation criteria, and it becomes available for the performance evaluation of the distribution board management system.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 D
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• pp.1965-1967
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• 1999

We have investigated the electrical characteristics of the poly-Si TFT's with the novel gate insulator structure. The gate insulator makes the offset region to reduce leakage current, and the electrical characteristics are obtained by employing Virtual Wafer Fab. simulator. As increases the gate insulator thickness above the offset region of this structure from $0{\AA}$ to $2000{\AA}$, the OFF state current at $V_G$=10V decrease by two orders in magnitude while ON state current doesn't decrease significantly. ON/OFF current ratios for conventional device and the proposed device with $2000{\AA}$ gate insulator thickness are $1.68{\times}10^5$ and $1.07{\times}10^7$, respectively.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 B
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• pp.697-699
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• 2002

In this paper, the characteristics analysis of the eddy current sensor by using boundary element method package is presented. For the boundary element analysis. Faraday, which is the commercial package of the integrated engineering software, is used. To observe the impedance characteristic of the eddy current senor with the sensor position and lift-off, the eddy current testing analysis is performed on the ferromagnetic plate with defect. Considering the skin depth of the ferromagnetic specimen, the 800(Hz) driving source is chosen. The result shows that electro motive force is reduced as the probe moves to near the defect and the lift-off of the probe increases.

• 한국표면공학회지
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• 제35권3호
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• pp.141-148
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• 2002

Fe-C alloy layers were produced by pulse plating and the properties were compared with those produced by D.C. plating. When the pulse on time ($T_{on}$ ) was the same, both the duty cycle and peak current density($I_{p}$ ) had little influence on the carbon content and the hardness of the layer. The structure and hardness of the direct current plating were similar to those of the pulse current plating. However, the ductility was enhanced when the pulse current was applied due to the release of residual stress during the pulse off time($T_{off}$).).

• 전력전자학회:학술대회논문집
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• 전력전자학회 1999년도 전력전자학술대회 논문집
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• pp.663-666
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• 1999

This paper describes a three-phase converter with high power factor using a scheme of discontinuous current mode(DCM). The proposed system can replace the conventional diode bridge with step-up chopper which is used as a converter for adjustable speed drive. In this system, the current of reactor is zero at turn-on instance because of operation in DCM, while the switch turns off at the instance of maximum current. A soft-switching scheme with lossless snubber was proposed. Therefore, a zero-voltage switching at turn off can be achived by lossless snubber and zero-current switching at turn on can be obtained by operating under DCM. A theoretical analysis and computer simulations with PSpice were done to verify the operation of the proposed system. Also a prototype of hardware system was built and tested for verifying the feasibility of proposed system.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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• pp.249-252
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• 2002

we have studied the characteristics of PHEMT's with gate recess etching method. The DC characterization of PHTMT fabricated with the wide single recess methods is a maximum drain current density of 319.4 ㎃/mm and a peak transconductance of 336.7 ㎳/mm. The RF measurements were obtained in the frequency range of 1~50GHz. At 50GHz, 3.69dB of 521 gain were obtained and a current gain cut-off frequency(f$_{T}$) of 113 CH and a maximum frequency of oscillation(f$_{max}$) of 172 Ghz were achieved from this device. On the other hand, a maximum drain current of 367 mA/mm, a peak transconduclancc of 504.6 mS/mm, S$_{21}$ gain of 2.94 dB, a current gain cut-off frequency(f$_{T}$) of 101 CH and a maximum frequency of oscillation(f$_{max}$) of 113 fa were achieved from the PHEMT's fabricated by the .narrow single recess methods.methods.

• 전자공학회논문지A
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• 제32A권1호
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• pp.129-137
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• 1995

AlGaAs/GaAs HBTs have been fabricated using SABM (Self-Aligned Base Metal) process technique. The mesa type HBTs were fabricated through following steps: isolation implant, wet etching, metal lift-off, and airbridge interconnection process. The fabricated HBTs with 2umx10um size emitter showed a common emitter current gain of 10 at a collector current density of Jk=100kA/cm$^{2}$, a breakdown volgate BVCEO of 8V, and the ideality factors of base and collector junctions of 1.6 and 1.1, respectively. On-wafer S-Parameter measurement at 0.5~18GHz has been made for the characterization of the common emitter HBTx with a 2umx10um size emitter. The extrapolated current gain cut-off frequency of ft=30GHz and maximum oscillation frequency of fmax=23 GHz were obtained at a collector current density of Jc=70kA/cm$^{2}$. Small signal HBT equivalent circuit was extracted from the S-Parameter data.

• Journal of Power Electronics
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• 제8권4호
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• pp.345-353
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• 2008

In this paper, a novel loss minimization of an induction generator in wind energy generation systems is presented. The proposed algorithm is based on the flux level reduction, for which the generator d-axis current reference is estimated using support vector regression (SVR). Wind speed is employed as an input of the SVR and the samples of the generator d-axis current reference are used as output to train the SVR algorithm off-line. Data samples for wind speed and d-axis current are collected for the training process, which plots a relation of input and output. The predicted off-line function and the instantaneous wind speed are then used to determine the d-axis current reference. It is shown that the effect of loss minimization is more significant at low wind speed and the loss reduction is about to 40% at 4[m/s] wind speed. The validity of the proposed scheme has been verified by experimental results.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.403-404
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• 2012

We fabricated TFT devices with the GeSe channel. A single device consists of a Pt source and drain, a Ti glue layer and a GeSe chalcogenide channel layer on SiO2/Si substrate which worked as the gate. We confirmed the drain current with variations of gate bias and channel size. The I-V curves of the switching device are shown in Fig. 1. The channel of the device always contains amorphous state, but can be programmed into two states with different threshold voltages (Vth). In each state, the device shows a normal Ovonic switching behavior. Below Vth (OFF state), the current is low, but once the biasing voltage is greater than Vth (ON state), the current increases dramatically and the ON-OFF ratio is high. Based on the experiments, we draw the conclusion that the gate voltage can enhance the drain current, and the electric field by the drain voltage affects the amorphous-amorphous transition. The switching device always contains the amorphous state and never exhibits the Ohmic behavior of the crystalline state.