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The resistance characterization of OTP device using anti-fuse MOS capacitor after programming (안티퓨즈 MOS capacitor를 이용한 OTP 소자의 프로그래밍 후의 저항특성)

  • Chang, Sung-Keun;Kim, Youn-Jang
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.13 no.6
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    • pp.2697-2701
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    • 2012
  • The yield of OTP devices using anti-fuse MOS capacitor have been affected by the input resistance, the size of the pass transistor and the read transistor, and the readout voltage of programed cell. To investigate the element which gives an effect to yield, we analyze the full map data of the resistance characterization of OTP device and those data in a various experimental condition. As a result, we got the optimum conditions which is necessary to the yield improvement. The optimum conditions are as follows: Input resistance is 50 ohms, the channel length of pass transistor is 10um, read voltage is 2.8 volt, respectively.

Optimization of the Earthing Resistance and Research on the Electrical Characteristics of New Catalyst for the Quality Earthing (접지품질 개선을 위한 접지저항 최적화 및 접지충진제의 전기적 특성 연구)

  • Park, C.G.;Ahn, S.J.;Woo, J.W.;Ahn, S.J.;Yu, Y.J.;Ahn, S.J.
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.7 no.6
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    • pp.1078-1085
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    • 2006
  • In earthing technologies, the intrusion of the surge wave can be protected when the earthing resistance is as low as several ohms. However, the cost fer realizing such a low resistance is quite high. Therefore it is important to determine appropriate target value of the earthing resistance to install cost-effective grounding system. In this work, we have proposed an optimization method of the earthing resistance according to the various environmental parameters by using a numerical simulator We have also developed new catalyst composed of water-soluble alkaline elements and activated carbon and investigated its electrical characteristics for enhancement of the earthing qualities.

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A Study on the Design of Metadata Elements for Management of Oral History Archives about Sexual Slavery by Japan's Military (일본군 '위안부' 구술기록의 관리를 위한 메타데이터 요소 선정에 관한 연구)

  • Bong, Ji Hyeon;Nam, Young Joon
    • Journal of Korean Society of Archives and Records Management
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    • v.19 no.1
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    • pp.225-250
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    • 2019
  • The oral record related to the sexual slavery by Japan's military is considered important evidence as it can grasp the damage situation and actual condition at that time. Therefore, systematic and integrated management of the organization's oral records is necessary. For this purpose, this study proposed metadata elements for the management of oral records. The metadata proposed in this study consists of 16 upper elements and subelements, respectively. The suggested upper elements consist of 6 "essential elements" and 10 "optional elements." The essential elements are "title," "date," "format," "creator," "content," and "rights."

Integration Technologies for 3D Systems

  • Ramm, P.;Klumpp, A.;Wieland, R.;Merkel, R.
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2003.09a
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    • pp.261-278
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    • 2003
  • Concepts.Wafer-Level Chip-Scale Concept with Handling Substrate.Low Accuracy Placement Layout with Isolation Trench.Possible Pitch of Interconnections down to $10{\mu}{\textrm}{m}$ (Sn-Grains).Wafer-to-Wafer Equipment Adjustment Accuracy meets this Request of Alignment Accuracy (+/-1.5 ${\mu}{\textrm}{m}$).Adjustment Accuracy of High-Speed Chip-to-Wafer Placement Equipment starts to meet this request.Face-to-Face Modular / SLID with Flipped Device Orientation.interchip Via / SLID with Non-Flipped Orientation SLID Technology Features.Demonstration with Copper / Tin-Alloy (SLID) and W-InterChip Vias (ICV).Combination of reliable processes for advanced concept - Filling of vias with W as standard wafer process sequence.No plug filling on stack level necessary.Simultanious formation of electrical and mechanical connection.No need for underfiller: large area contacts replace underfiller.Cu / Sn SLID layers $\leq$ $10{\mu}{\textrm}{m}$ in total are possible Electrical Results.Measurements of Three Layer Stacks on Daisy Chains with 240 Elements.2.5 Ohms per Chain Element.Contribution of Soldering Metal only in the Range of Milliohms.Soldering Contact Resistance ($0.43\Omega$) dominated by Contact Resistance of Barrier and Seed Layer.Tungsten Pin Contribution in the Range of 1 Ohm

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Capacitively Loaded Loop Antenna Fed with Metamaterial Balun (Metamaterial 발룬으로 급전된 Capacitively Loaded 루프 안테나)

  • Jung, Youn-Kwon;Lee, Bom-Son
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.20 no.10
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    • pp.1084-1090
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    • 2009
  • This paper presents a balun consisting of a T-junction, a Right/Left Handed Transmission line(RLH-TL), and a conventional Right Handed(RH) line. It is assumed that the RLH-TL consists of N unit-cells. We provide closed-form solutions and design a very compact wideband(80 %) balun using CPW lines based on the obtained solutions. Then, we propose a capacitively loaded loop antenna designed for a uniform current distribution. The antenna resistance of the proposed antenna at resonance is about 204 ohms. The length of the unit cell is about $\lambda/12$(total length: $1\;\lambda$). The magnetic field generated from the proposed antenna is stronger than that of the conventional one by as much as 20 dB. We used a coplanar strip line(CPS) to combine the loop antenna and balun. The proposed antenna may be used as a near field UHF RFID reader antenna.

Design of a One-Time Programmable Memory Cell for Power Management ICs (Power Management IC용 One-Time Programmable Memory Cell 설계)

  • Jeon, Hwang-Gon;Yu, Yi-Ning;Jin, Li-Yan;Kim, Du-Hwi;Jang, Ji-Hye;Lee, Jae-Hyung;Ha, Pan-Bong;Kim, Young-Hee
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.10a
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    • pp.84-87
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    • 2010
  • We manufacture an antifuse OTP (One-time programmable) cell for analog trimming which will be used in power management ICs. For the antifuse cell using dual program voltage of VPP (=7V) and VNN (=-5V), the thin gate oxide is broken down by applying a voltage higher than the hard break-down voltage to the terminals of the antifuse. The area of the manufactured antifuse OTP cell using $0.18{\mu}m$ BCD process is $48.01{\mu}m^2$ and is about 44.6 percent of that of an eFuse cell. The post-program resistances of the antifuse are good with the values under several kilo ohms when we measure twenty test patterns.

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Design of SIR-based Bandstop Filter with Symmetrical Hairpin Wideband (SIR 기반 대칭 헤어핀 광대역 대역저지 여파기)

  • Kim, Chang-Soon;Lee, Yong-IL
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.18 no.1
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    • pp.43-46
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    • 2018
  • This paper has designed a wideband bandpass filter (WBSF : Wide Band Stop Filter) using a stepped impedance resonator (SIR : Stepped Impedance Resonator) with improved performance and improved hairpin coupling structure. The SIR WBSF is small in size and has the advantage of having excellent bandstop characteristics. The designed BSF has a structure in which a quadrangular shaped hairpin of a / 4 length is arranged symmetrically on the upper and lower sides of the input and output transmission lines. The input and output terminals were terminated at 50 ohms for system applications. The center frequency of the SIR WBSF is 6.3 GHz, which is the second harmonic of 3.15 GHz. The designed filter has a 3dB bandwidth of 2.9 GHz and a transmission coefficient ($S_{21}$) of 33.2 dB. The reflection coefficient ($S_{11}$) at the center frequency is 0.106 dB. The application field is used for fixed microwave relay stations, fixed satellite and earth stations, and fixed satellite communications. The overall size is $20mm{\times}10mm$.

High Speed Mo2N/Mogate MOS Integrated Circuit (동작속도가 빠른 Mo2N/Mo 게이트 MOS 집적회로)

  • 김진섭;이우일
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.22 no.4
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    • pp.76-83
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    • 1985
  • Mo2N/Mo double layer which is to be used for gate of the RMOS (refractory metal oxide semiconductor) and interconnection material has been formed by means of low temperature r.f. reactive sputtering in Ar and N2 mixture. The sheet .esistance of 1 000$\AA$Mo2 N/4000$\AA$Mofilm was about 1.20-1.28 ohms/square, which is about an order of magnitude lower than that of polysilicon film. The workfunction difference naE between MO2N/MO layer and (100) p-Si with 6-9 ohm'cm resistivity obtained from C-V plots was about -0.30ev, and the fixed charge density Qss/q in the oxide was about 2. Ix1011/cm2. To evaluate the signal transfer delay time per inverter stage, an integrated ring oscillator circuit consisting of 45-stage inverters was fabricated using the polysilicon gate NMOS process. The signal transfer delay time per inverter stage obtained in this experiment was about 0.8 nsec

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fabrication of Self-Aligned Mo2N/MO-Gate MOSFET and Its Characteristics (자기 정렬된 Mo2N/Mo 게이트 MOSFET의 제조 및 특성)

  • 김진섭;이종현
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.21 no.6
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    • pp.34-41
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    • 1984
  • MOEN/MO double layer which is to be used It)r the RMOS (refractory metal oxide semiconductor) gate material has been fabricated by means of low temperature reactive sputtering in N2 and Ar mixture. Good Mo2N film was obtained in the volumetric mixture of Ar:N2=95:5. The sheet resistance of the fabricated Mo7N film was about 1.20 - 1.28 ohms/square, which is about an order of magnitude lower than that of polysilicon film, and this would enable to improve the operational speed of devices fabricated with this material. When PSG (phosphorus silicate glass) was used as impurity diffusion source for the source and drain of the RMOSFET in the N2 atmosphere at about 110$0^{\circ}C$, the Mo2N was reduced to Mo resulting in much smaller sheet resistance of about 0.38 ohm/square. The threshold voltage of the RMOSFET fabricated in our experiment was - 1.5 V, and both depletion and enhancement mode RMOSFETs could be obtained.

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The example of the Carbon Grounding Modules installation for PSD systems at a subway station, Seoulmetro (서울메트로 PSD장비 탄소접지모듈 설치 사례)

  • Chung, Young-Ki;Hyeon, Yong-Seop;Song, Byeong-Gwon;Kim, Yong-Hyeop
    • Proceedings of the KSR Conference
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    • 2008.06a
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    • pp.292-298
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    • 2008
  • Seoul Metro and Seoul Metropolitan Rapid Transit Corp. have started installing screen doors at subway platforms to improve the environment of subways and prevent passengers' accidents since 2006. They are still installing screen doors at subway platforms and Metropolitan Rapid Transit Corporations in other areas are also proceeding with installment of screen doors or making preparations for it. Grounding is necessary for installing PSD systems. In case that PSD grounding is connected with existing electrical equipment grounding system, it was decided to install separate grounding for safe operation of PSD system and passenger safety. However, it's very difficult to install new grounding at the subway station compound. A way to improve this condition is that we proceed with grounding by composing grounding station by carbon grounding rod. This paper will mainly deal with how to design and construct carbon ground rod, which has been applied to PSD system grounding since 2006, including its experimental examples. In this paper, ways to secure ground resistance below 5 ohms, which is resistance necessary for PSD grounding, and to compose grounding system were also discussed. Furthermore, a ground test to check the ability to fulfill a role of PSD grounding system was conducted. As a result of applying carbon grounding module, PSD system is being operated without any problem and the installment of PSD system will be continuously expanded in the future. It's also thought that a way to integrate grounding of each functional room which has been installed at the subway station compound and to arrange equipotential grounding should be reviewed and performed promptly.

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