• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.24-25
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• 2008

The effect of heat treatment in $HfO_2$ as charge trap with $SiO_2/Si_3N_4/SiO_2$ as tunnel oxide layer in capacitors has been investigated. Rapid thermal annealing (RTA) were carried out at the temperature range of 600 - $900^{\circ}C$. It is found that all devices carried out heat treatment have large threshold voltage shift Especially, device performed heat treatment at $900^{\circ}C$ has been confirmed the largest memory window. Also, Threshold voltage shift of device used conventional $SiO_2$ as tunnel oxide layer was smaller than that with $SiO_2/Si_3N_4/SiO_2$.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.08a
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• pp.120-120
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• 2011

Graphene is a carbon based material and it has great potential of being utilized in various fields such as electronics, optics, and mechanics. In order to develop graphene-based logic systems, graphene field-effect transistor (GFET) has been extensively explored. GFET requires supporting devices, such as volatile memory, to function in an embedded logic system. As far as we understand, graphene has not been studied for volatile memory application, although several graphene non-volatile memories (GNVMs) have been reported. However, we think that these GNVM are unable to serve the logic system properly due to the very slow program/read speed. In this study, a GVM based on the GFET structure and using an engineered graphene channel is proposed. By manipulating the deposition condition, charge traps are introduced to graphene channel, which store charges temporarily, so as to enable volatile data storage for GFET. The proposed GVM shows satisfying performance in fast program/erase (P/E) and read speed. Moreover, this GVM has good compatibility with GFET in device fabrication process. This GVM can be designed to be dynamic random access memory (DRAM) in serving the logic systems application. We demonstrated GVM with the structure of FET. By manipulating the graphene synthesis process, we could engineer the charge trap density of graphene layer. In the range that our measurement system can support, we achieved a high performance of GVM in refresh (>10 ${\mu}s$) and retention time (~100 s). Because of high speed, when compared with other graphene based memory devices, GVM proposed in this study can be a strong contender for future electrical system applications.

• Journal of the Microelectronics and Packaging Society
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• v.30 no.4
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• pp.32-43
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• 2023

Resistive Random Access Memory (RRAM), based on resistive switching characteristics, is emerging as a next-generation memory device capable of efficiently processing large amounts of data through its fast operation speed, simple device structure, and high-density implementation. Interface type resistive switching offer the advantage of low operation currents without the need for a forming process. Especially, for RRAM devices based on transition metal oxides, various studies are underway to enhance the memory characteristics, including precise material composition control and improving the reliability and stability of the device. In this paper, we introduce various methods, such as doping of heterogeneous elements, formation of multilayer films, chemical composition adjustment, and surface treatment to prevent degradation of interface type resistive switching properties and enhance the device characteristics. Through these approaches, we propose the feasibility of implementing high-efficient next-generation non-volatile memory devices based on improved resistive switching properties.

• Bulletin of the Korean Chemical Society
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• v.32 no.3
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• pp.783-784
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• 2011

• Journal of the Korea Society of Computer and Information
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• v.22 no.4
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• pp.25-32
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• 2017

Recently, the use of NAND flash memory is being increased as a secondary device to displace conventional magnetic disk. NAND flash memory, as one among non-volatile memories, has many advantages such as low power, high reliability, low access latency, and so on. However, NAND flash memory has disadvantages such as erase-before-write, unbalanced operation speed, and limited P/E cycles, unlike conventional magnetic disk. To solve these problems, NAND flash memory mainly adopted FTL (Flash Translation Layer). In particular, garbage collection technique in FTL tried to improve the system lifetime. However, previous garbage collection techniques have a sensitive property of the system lifetime according to write pattern. To solve this problem, we propose BSGC (Balanced Selection-based Garbage Collection) technique. BSGC efficiently selects a victim block using all intervals from the past information to the current information. In this work, SFL (Search First linked List), as the proposed block allocation policy, prolongs the system lifetime additionally. In our experiments, SFL and BSGC prolonged the system lifetime about 12.85% on average and reduced page migrations about 22.12% on average. Moreover, SFL and BSGC reduced the average response time of 16.88% on average.

• Proceedings of the Polymer Society of Korea Conference
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• 2006.10a
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• pp.237-237
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• 2006

P(VDF/TrFE(72/28) ultrathin films were used in the fabrication of Metal-Ferroelectric polymer-Metal (MFM) single bit device with special emphasis on uniform film surface, faster dipole switching time under applied external field and longer memory retention time. AFM and FTIR-GIRAS were complementary in analyzing surface crystalline morphology and the resultant change in chain orientation with varying thermal history. DC-EFM technique was used to 'write-read-erase' the data on the memory bit in a much faster time than P-E studies. The results obtained from this study will enable us to have a good understanding of the ferroelectric and piezoelectric behavior of P(VDF/TrFE)(72/28) thin films suitable for high density data storage applications.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.1
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• pp.1-7
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• 2019

Recently, memristor (anion-based memristor) is referred to as the fourth circuit element which resistance state can be gradually changed by the electric pulse signals that have been applied to it. And the stored information in a memristor is non-volatile and also the resistance of a memristor can vary, through intermediate states, between high and low resistance states, by tuning the voltage and current. Therefore the memristor can be applied for analogue memory and/or learning device. Usually, memristive behavior is easily observed in the most transition metal oxide system, and it is explained by electrochemical migration motion of anion with electric field, electron scattering and joule heating. This paper reports the latest trends and issues of anion-based memristor.

• Korean Journal of Materials Research
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• v.20 no.5
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• pp.257-261
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• 2010

A non-volatile resistive random access memory (RRAM) device with a Cr-doped $SrZrO_3/SrRuO_3$ bottom electrode heterostructure was fabricated on $SrTiO_3$ substrates using pulsed laser deposition. During the deposition process, the substrate temperature was $650^{\circ}C$ and the variable ambient oxygen pressure had a range of 50-250 mTorr. The sensitive dependences of the film structure on the processing oxygen pressure are important in controlling the bistable resistive switching of the Cr-doped $SrZrO_3$ film. Therefore, oxygen pressure plays a crucial role in determining electrical properties and film growth characteristics such as various microstructural defects and crystallization. Inside, the microstructure and crystallinity of the Cr-doped $SrZrO_3$ film by oxygen pressure were strong effects on the set, reset switching voltage of the Cr-doped $SrZrO_3$. The bistable switching is related to the defects and controls their number and structure. Therefore, the relation of defects generated and resistive switching behavior by oxygen pressure change will be discussed. We found that deposition conditions and ambient oxygen pressure highly affect the switching behavior. It is suggested that the interface between the top electrode and Cr-doped $SrZrO_3$ perovskite plays an important role in the resistive switching behavior. From I-V characteristics, a typical ON state resistance of $100-200\;{\Omega}$ and a typical OFF state resistance of $1-2\;k{\Omega}$, were observed. These transition metal-doped perovskite thin films can be used for memory device applications due to their high ON/OFF ratio, simple device structure, and non-volatility.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.13-13
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• 2011

Graphene based nano-electronic and nano-electromechanical devices will be introduced in this presentation. The first part of the presentation will be covered by our recent results on the fabrication and physical properties of artificially twisted bilayer graphene. Thanks to the recently developed contact transfer printing method, a single layer graphene sheet is stacked on various substrates/nano-structures in a controlled manner for fabricating e.g. a suspended graphene device, and single-bilayer hybrid junction. The Raman and electrical transport results of the artificially twisted bilayer indicates the decoupling of the two graphene sheets. The graphene based electromechanical devices will be presented in the second part of the presentation. Carbon nanotube based nanorelay and A new concept of non-volatile memory based on the carbon nanotube field effect transistor together with microelectromechanical switch will be briefly introduced at first. Recent progress on the graphene based nano structures of our group will be presented. The array of graphene resonators was fabricated and their mechanical resonance properties are discussed. A novel device structures using carbon nanotube field effect transistor combined with suspended graphene gate will be introduced in the end of this presentation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.7
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• pp.1-9
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• 2011

Memristor is a portmanteau of "memory resistor". The resistance of memristor is changed depends on the history of electric charge that passed through the device and it is able to memorize the last resistance after turning off the power supply. This paper presents this device that has a high chance to be the next generation of commercial non-volatile memory and its behavior modeling using SPICE simulation. The memristor MOS content addressable memory (M_CAM) is also designed and simulated using the proposed behavioral model. The proposed M_CAM unit cell area and power consumption show an improvement around 40% and 96%, respectively, compare to the conventional SRAM based CAMs. The M_CAM layout is also implemented using 0.13${\mu}m$ mixed-signal CMOS process under 1.2 V supply voltage.