• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 D
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• pp.1327-1329
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• 1998

It is very important to select superior inter-layer PMD(Pre Metal Dielectric) materials which can act as penetration barrier to various impurities created by CMP processes. In this paper, hot carrier degradation and device characteristics were studied with material variation of PMD-1 layers, which were split by LP-TEOS, SR-Oxide, PE-Oxynitride, PE-Nitride, PE-TEOS films. It was observed that the oxynitride and nitride using plasma was greatly decreased in hot carrier effect in comparison with silicon oxide. Consequently, silicon oxide turned out to be a better PMD-1 material than PE-oxynitride and PE-nitride. Also, LP-TEOS film was the best PMD-1 material Among the silicon oxides.

• 정보저장시스템학회논문집
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• 제1권1호
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• pp.73-77
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• 2005

In this paper, a new silicon nitride cantilever integrated with silicon heater and piezoelectric sensor has been firstly developed to improve the uniformity of the initial bending and the mechanical stability of the cantilever array for thermo-piezoelectric SPM(scanning probe microscopy) -based data storages. This nitride cantilever shows thickness uniformity less than $2\%$. Data bits of 40 nm in diameter were recorded on PMMA film. The sensitivity of the piezoelectric sensor was 0.615 fC/nm after poling the PZT layer. For high speed operation, 128${\times}$128 probe array was developed.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.192-192
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• 2012

The next generation electronics need to not only be smaller but also be more flexible. To meet such demands, electronic devices using two dimensional (2D) atomic crystals like graphene, hexagonal boron nitride (h-BN), molybdenum disulfate ($MoS_2$) and organic thin film have been studied intensely. In this talk, I will demonstrate the $MoS_2$ field effect transistor (FET) toward performance enhancement by insulating h-BN substrate.

• 한국세라믹학회지
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• 제28권12호
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• pp.961-968
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• 1991

The nature and composition of the surfaces of silicon nitride and β-Sialon powders were investigated using high voltage and high resolution transmission electron microscopy (TEM) and X-ray photoelectron spectroscopy (XPS). β-Sialon powder was produced from Hadong kaolin by the carbothermic reduction and simultaneous nitridation. XPS showed that Al was contained in the surface of β-Sialon powder besides Si, N and O components, which is different from that of silicon nitride. It was supposed that Al in the surface of β-Sialon was bonded with oxygen from the oxygen-nitrogen ratio and the measurement of Al 2p binding energies. After both silicon nitride and β-Sialon powders were oxidized at 800℃ for 24h in air, nitrogen didn't exist in the surfaces and the depth of the oxide layer increased. The measurement of Si 2p binding energies showed that the chemical shifts occurred from Si3N2O and/or Si2N2O to SiO2 phase.

• Transactions on Electrical and Electronic Materials
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• 제12권4호
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• pp.148-151
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• 2011

We designed and fabricated aluminium gallium nitride (AlGaN)/GaN high electron mobility transistors (HEMTs) with stable reverse blocking characteristics established by employing a selective fluoride plasma treatment on the drainside gate edge region where the electric field is concentrated. Implanted fluoride ions caused a depolarization in the AlGaN layer and introduced an extra depletion region. The overall contour of the depletion region was expanded along the drift region. The expanded depletion region distributed the field more uniformly and reduced the field intensity peak. Through this field modulation, the leakage current was reduced to 9.3 nA and the breakdown voltage ($V_{BR}$) improved from 900 V to 1,400 V.

• 한국진공학회지
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• 제13권3호
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• pp.114-119
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• 2004

Si 원료물질로 $SiH_2Cl_2$, N 원료물질로 $NH_3$를 사용하여 증착온도 $550^{\circ}C$에서 P-type Si (100) 기판위에 실리콘 질화막을 원자층 증착 방법으로 형성하고 물리적, 전기적 특성을 평가하였다. 증착된 박막의 두께는 증착 주기의 횟수에 대해 선형적으로 증가하였고, Si와 N 원료물질의 공급량이 $3.0\times10^{9}$ L 일 때 0.13 nm/cycle의 박막 성장속도를 얻을 수 있었다. 원자층 증착된 박막의 물리적 특성을 기존의 저압화학증착 방법에 의해 증착된 박막과 비교한 결과, 원자층 증착 방법을 사용함으로써 기존의 방법보다 증착온도를 $200 ^{\circ}C$이상 낮추면서도 굴절률 및 습식에칭 속도 측면에서 유사한 물성을 가진 실리콘 질화막을 형성할 수 있었다. 특히, 원자층 증착된 박막의 누설 전류밀도는 3 MV/cm의 전기장에서 0.79 nA/$\textrm{cm}^2$로서 저압화학증착 방법에 의해 증착된 질화막의 6.95 nA/$\textrm{cm}^2$보다 우수하였다.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2010년도 추계학술대회 논문집
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• pp.851-852
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• 2010

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.426.2-426.2
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• 2016

Numerous of researches are being conducted to improve the efficiency of $Cu_2ZnSnSe_4$ (CZTSe)-based photovoltaic devices, which is one of the most promising candidates for low cost and environment-friendly solar cells. In this work, we concentrate on the back contact of the devices. A proper thickness of $MoSe_2$ in back contact structure is believed to enhance adhesion and ohmic contact between Mo back contact and absorber layer. Nevertheless, too thick $MoSe_2$ layers that are grown during high-temperature selenization process can impede the current collection, thus resulting in low cell performance. By applying molybdenum nitride as a barrier in back contact structure, we were able to control the thickness of $MoSe_2$ layer, which resulted in lower series resistance and higher fill factor of CZTSe devices. The phase transformation of Mo-N binary system was systematically studied by changing $N_2$ concentration during the sputtering process. With a proper phase of Mo-N fabricated by using an adequate partial pressure of $N_2$, the efficiency of CZTSe solar cells as high as 8.31% was achieved while the average efficiency was improved by about 2% with respect to that of the referent cells where no barrier layer was employed.

• 한국표면공학회지
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• 제49권6호
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• pp.530-538
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• 2016

There is a close relationship between the performance and the heat generation of the electronic device. Heat generation causes a significant degradation of the durability and/or efficiency of the device. It is necessary to have an effective method to release the generated heat. Based on demands of the printed circuit board (PCB) manufacturing, it is necessary to develop a robust and reliable plating technique for substrates with high thermal conductivity, such as alumina ($Al_2O_3$), aluminium nitride (AlN), and silicon nitride ($Si_3N_4$). In this study, the plating of metal layers on an insulating silicon nitride ($Si_3N_4$) ceramic substrate was developed. We formed a Pd-$TiO_2$ adhesion layer and used APTES(3-Aminopropyltriethoxysilane) to form OH groups on the surface and adhere the metal layer on the insulating $Si_3N_4$ substrate. We used an electroless Ni plating without sensitization/activation process, as Pd particles were nucleated on the $TiO_2$ layer. The electrical resistivity of Ni and Cu layers is $7.27{\times}10^{-5}$ and $1.32{\times}10^{-6}ohm-cm$ by 4 point prober, respectively. The adhesion strength is 2.506 N by scratch test.

• 한국태양에너지학회:학술대회논문집
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• 한국태양에너지학회 2012년도 춘계학술발표대회 논문집
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• pp.243-247
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• 2012

The paper focuses on an anti-reflection (AR) coating deposited by PECVD in silicon solar cell fabrication. AR coating is effective to reduce the reflection of the light on the silicon wafer surface and then increase substantially the solar cell conversion efficiency. In this work, we carried out experiments to optimize double AR coating layer with silicon nitride and silicon oxide for the silicon solar cells. The p-type mono crystalline silicon wafers with $156{\times}156mm^2$ area, 0.5-3 ${\Omega}{\cdot}cm$ resistivity, and $200{\mu}m$ thickness were used. All wafers were textured in KOH solution, doped with $POCl_3$ and removed PSG before ARC process. The optimized thickness of each ARC layer was calculated by theoretical equation. For the double layer of AR coating, silicon nitride layer was deposited first using $SiH_4$ and $NH_3$, and then silicon oxide using $SiH_4$ and $N_2O$. As a result, reflectance of $SiO_2/SiN_x$ layer was lower than single $SiN_x$ and then it resulted in increase of short-circuit current and conversion efficiency. It indicates that the double AR coating layer is necessary to obtain the high efficiency solar cell with PECVD already used in commercial line.