• Title/Summary/Keyword: Nitride Film

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Thermal Transfer Pixel Patterning by Using an Infrared Lamp Source for Organic LED Display (유기 발광 소자 디스플레이를 위한 적외선 램프 소스를 활용한 열 전사 픽셀 패터닝)

  • Bae, Hyeong Woo;Jang, Youngchan;An, Myungchan;Park, Gyeongtae;Lee, Donggu
    • Journal of Sensor Science and Technology
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    • v.29 no.1
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    • pp.27-32
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    • 2020
  • This study proposes a pixel-patterning method for organic light-emitting diodes (OLEDs) based on thermal transfer. An infrared lamp was introduced as a heat source, and glass type donor element, which absorbs infrared and generates heat and then transfers the organic layer to the substrate, was designed to selectively sublimate the organic material. A 200 nm-thick layer of molybdenum (Mo) was used as the lightto-heat conversion (LTHC) layer, and a 300 nm-thick layer of patterned silicon dioxide (SiO2), featuring a low heat-transfer coefficient, was formed on top of the LTHC layer to selectively block heat transfer. To prevent the thermal oxidation and diffusion of the LTHC material, a 100 nm-thick layer of silicon nitride (SiNx) was coated on the material. The fabricated donor glass exhibited appropriate temperature-increment property until 249 ℃, which is enough to evaporate the organic materials. The alpha-step thickness profiler and X-ray reflection (XRR) analysis revealed that the thickness of the transferred film decreased with increase in film density. In the patterning test, we achieved a 100 ㎛-long line and dot pattern with a high transfer accuracy and a mean deviation of ± 4.49 ㎛. By using the thermal-transfer process, we also fabricated a red phosphorescent device to confirm that the emissive layer was transferred well without the separation of the host and the dopant owing to a difference in their evaporation temperatures. Consequently, its efficiency suffered a minor decline owing to the oxidation of the material caused by the poor vacuum pressure of the process chamber; however, it exhibited an identical color property.

Pressure Sensing Properties of AlN Thin Films Sputtered at Room Temperature

  • Seok, Hye-Won;Kim, Sei-Ki;Kang, Yang-Koo;Lee, Youn-Jin;Hong, Yeon-Woo;Ju, Byeong-Kwon
    • Journal of Sensor Science and Technology
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    • v.23 no.2
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    • pp.94-98
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    • 2014
  • Aluminum nitride (AlN) thin films with a TiN buffer layer have been fabricated on SUS430 substrate by RF reactive magnetron sputtering at room temperature under 25~75% $N_2$ /Ar. The characterization of film properties were performed using surface profiler, X-ray diffraction, X-ray photoelectron spectroscopy(XPS), and pressure-voltage measurement system. The deposition rates of AlN films were decreased with increasing the $N_2$ concentration owing to lower mass of nitrogen ions than Ar. The as-deposited AlN films showed crystalline phase, and with increasing the $N_2$ concentration, the peak of AlN(100) plane and the crystallinity became weak. Any change in the preferential orientation of the as-deposited AlN films was not observed within our $N_2$ concentration range. But in the case of 50% $N_2$ /Ar condition, the peak of (002) plane, which is determinant in pressure sensing properties, appeared. XPS depth profiling of AlN/TiN/SUS430 revealed Al/N ratio was close to stoichiometric value (45:47) when deposited under 50% $N_2/Ar$ atmosphere at room temperature. The output signal voltage of AlN sensor showed a linear behavior between 26~85 mV, and the pressure-sensing sensitivity was calculated as 7 mV/MPa.

The Single-Side Textured Crystalline Silicon Solar Cell Using Dielectric Coating Layer (절연막을 이용한 단면 표면조직화 결정질 실리콘 태양전지)

  • Do, Kyeom-Seon;Park, Seok-Gi;Myoung, Jae-Min;Yu, Gwon-Jong;Song, Hee-Eun
    • 한국태양에너지학회:학술대회논문집
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    • 2011.11a
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    • pp.245-248
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    • 2011
  • Many researches have been carried out to improve light absorption in the crystalline silicon solar cell fabrication. The rear reflection is applied to increase the path length of light, resulting in the light absorption enhancement and thus the efficiency improvement mainly due to increase in short circuit current. In this paper, we manufactured the silicon solar cell using the mono crystalline silicon wafers with $156{\times}156mm^2$, 0.5~3.0 ${\Omega}{\cdot}cm$ of resistivity and p-type. After saw damage removal, the dielectric film ($SiN_x$)on the back surface was deposited, followed by surface texturing in the KOH solution. It resulted in single-side texturing wafer. Then the dielectric film was removed in the HF solution. The silicon wafers were doped with phosphorus by $POCl_3$ with the sheet resistance 50 ${\Omega}/{\Box}$ and then the silicon nitride was deposited on the front surface by the PECVD with 80nm thickness. The electrodes were formed by screen-printing with Ag and Al paste for front and back surface, respectively. The reflectance and transmittance for the single-sided and double-sided textured wafers were compared. The double-sided textured wafer showed higher reflectance and lower transmittance at the long wavelength region, compared to single-sided. The completed crystalline silicon solar cells with different back surface texture showed the conversion efficiency of 17.4% for the single sided and 17.3% for the double sided. The efficiency improvement with single-sided textured solar cell resulted from reflectance increase on back surface and light absorption enhancement.

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Improvement in the bias stability of zinc oxide thin-film transistors using an $O_2$ plasma-treated silicon nitride insulator

  • Kim, Ung-Seon;Mun, Yeon-Geon;Gwon, Tae-Seok;Park, Jong-Wan
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.180-180
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    • 2010
  • Thin film transistors (TFTs) based on oxide semiconductors have emerged as a promising technology, particularly for active-matrix TFT-based backplanes. Currently, an amorphous oxide semiconductor, such as InGaZnO, has been adopted as the channel layer due to its higher electron mobility. However, accurate and repeatable control of this complex material in mass production is not easy. Therefore, simpler polycrystalline materials, such as ZnO and $SnO_2$, remain possible candidates as the channel layer. Inparticular, ZnO-based TFTs have attracted considerable attention, because of their superior properties that include wide bandgap (3.37eV), transparency, and high field effect mobility when compared with conventional amorphous silicon and polycrystalline silicon TFTs. There are some technical challenges to overcome to achieve manufacturability of ZnO-based TFTs. One of the problems, the stability of ZnO-based TFTs, is as yet unsolved since ZnO-based TFTs usually contain defects in the ZnO channel layer and deep level defects in the channel/dielectric interface that cause problems in device operation. The quality of the interface between the channel and dielectric plays a crucial role in transistor performance, and several insulators have been reported that reduce the number of defects in the channel and the interfacial charge trap defects. Additionally, ZnO TFTs using a high quality interface fabricated by a two step atomic layer deposition (ALD) process showed improvement in device performance In this study, we report the fabrication of high performance ZnO TFTs with a $Si_3N_4$ gate insulator treated using plasma. The interface treatment using electron cyclotron resonance (ECR) $O_2$ plasma improves the interface quality by lowering the interface trap density. This process can be easily adapted for industrial applications because the device structure and fabrication process in this paper are compatible with those of a-Si TFTs.

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Fabrication and Operating Properties of Nb Silicide-coated Si-tip Field Emitter Arrays (니오비움 실리사이드가 코팅된 실리콘 팁 전계 방출 소자의 제조 및 동작 특성)

  • Ju, Byeong-Kwon;Park, Jae-Seok;Lee, Sangjo;Kim, Hoon;Lee, Yun-Hi;Oh, Myung-Hwan
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.48 no.7
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    • pp.521-524
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    • 1999
  • Nb silicide was formed on the Si micro-tip arrays in order to improve field emission properties of Si-tip field emitter array. After silicidization of the tips, the etch-back process, by which gate insulator, gate electrode and photoresist were deposited sequentially and gate holes were defined by removing gradually the photoresist by $O_2$ plasma from the surface, was applied. Si nitride film was used as a protective layer in order to prevent oxygen from diffusion into Nb silicide layer and it was identified that the NbSi2 was formed through annealing in $N_2$ ambient at $1100^{\circ}C$ for 1 hour. By the Nb silicide coating on Si tips, the turn-on voltage was decreased from 52.1 V to 32.3 V and average current fluctuation for 1 hour was also reduced from 5% to 2%. Also, the fabricated Nb silicide-coated Si tip FEA emitted electrons toward the phosphor and light emission was obtained at the gate voltage of 40~50 V.

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Room temperature deposition of SiN thin film using pulsed $SiH_4-N_2$ plasma and the effect of duty ratio on refractive index (펄스드 $SiH_4-N_2$ 플라즈마를 이용한 SiN 박막의 상온 증착과 굴절률에의 Duty ratio 영향)

  • Kwon, Sang-Hee;Kim, Byung-Whan;Woo, Hyung-Su;Lee, Hyung-Gu
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.25-26
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    • 2009
  • Pulsed-PECVD를 이용하여 상온에서 실리콘 나이트라이드(SiN) 박막을 증착하였다. 본 연구에서는, 60-100%의 duty ratio 변화에 따른 굴절률을 살펴보고, 굴절률에 대한 이온에너지의 영향을 분석했다. RF 소스파워는 900W로 고정하였고 $SiH_4-N_2$를 이용하였다. 이온에너지에 대한 정보는 non-invasive 이온 분석기를 이용하여 수집하였다. 측정된 이온에너지 변수는 high ion energy, low ion energy, high ion energy flux, low ion energy flux이며, 이를 이용해 또 다른 변수인 ion energy flux ratio를 계산하였다. Duty ratio의 감소에 따라 굴절률은 일반적으로 감소하였다. 또한 duty ratio의 감소에 따라 high ion energy는 증가하였다. 한편, 60-80%에서 굴절률은 이온에너지 flux의 비에 강한 의존성을 보였으며, 60%를 제외한 모든 duty ratio 구간에서 굴절률은 Nl에 강하게 영향을 알고 있는 것으로 유추되었다. 굴절률은 1.508와 1.714 사이에서 변화하였다.

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Effect of Slurry Characteristics on Nanotopography Impact in Chemical Mechanical Polishing and Its Numerical Simulation (기계.화학적인 연마에서 슬러리의 특성에 따른 나노토포그래피의 영향과 numerical시뮬레이션)

  • Takeo Katoh;Kim, Min-Seok;Ungyu Paik;Park, Jea-Gun
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2003.11a
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    • pp.63-63
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    • 2003
  • The nanotopography of silicon wafers has emerged as an important factor in the STI process since it affects the post-CMP thickness deviation (OTD) of dielectric films. Ceria slurry with surfactant is widely applied to STI-CMP as it offers high oxide-to-nitride removal selectivity. Aiming to control the nanotopography impact through ceria slurry characteristics, we examhed the effect of surfactant concentration and abrasive size on the nanotopography impact. The ceria slurries for this study were produced with cerium carbonate as the starting material. Four kinds of slurry with different size of abrasives were prepared through a mechanical treatment The averaged abrasive size for each slurry varied from 70 nm to 290 nm. An anionic organic surfactant was added with the concentration from 0 to 0.8 wt %. We prepared commercial 8 inch silicon wafers. Oxide Shu were deposited using the plasma-enhanced tetra-ethyl-ortho-silicate (PETEOS) method, The films on wafers were polished on a Strasbaugh 6EC. Film thickness before and after CMP was measured with a spectroscopic ellipsometer, ES4G (SOPRA). The nanotopogrphy height of the wafer was measured with an optical interferometer, NanoMapper (ADE Phase Shift)

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Characteristic Properties of TiN Thin Films Prepared by DC Magnetron Sputtering Method for Hard Coatings (Hard Coating 응용을 위한 DC 마그네트론 스퍼터링 방법을 이용하여 증착한 TiN 박막의 특성에 대한 연구)

  • Kim, Young-Ryeol;Park, Yong-Seob;Choi, Won-Seok;Hong, Byung-You
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.21 no.7
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    • pp.660-664
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    • 2008
  • Titanium nitride (TiN) thin films are widely used for hard coatings due to their superior hardness, chemical stability, low friction and good adhesion properties. In this study, we investigated the effect of DC power on the characteristics of TiN thin films deposited on Si and glass substrates by DC magnetron sputtering using TiN target. We made TiN films of 300 nm thickness with various DC powers. The structural properties of films are investigated by x-ray diffractions (XRD) and tribological properties are measured by nano-indentation, nano-scratch tester. The rms roughness was measured by atomic forced microscopy (AFM). In the result, TiN films had the smooth surface and exhibited (111) directions with the increase of DC Power. Also, especially in case of 175 W DC power, TiN film exhibited the maximum hardness about 8 GPa, and the critical load near 25.

Characteristics of AlN Dielectric Layer for Metal PCB as a Function of Nitrogen Partial Pressure Using RF-Magnetron Sputtering Method (RF-Magnetron Sputtering 방법을 이용해 질소분압비에 따른 금속 PCB용 AlN 절연막의 특성)

  • Kim, Hwa-Min;Park, Jeong-Sik;Kim, Dong-Young;Bae, Kang;Sohn, Sun-Young
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.23 no.10
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    • pp.759-762
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    • 2010
  • In this investigation, the effects of $N_2/(Ar+N_2)$ gas partial pressure on the structural, electrical, and thermal properties of AlN dielectric layers prepared on aluminum substrates using RF-magnetron sputtering method were analyzed. Among the films, the AlN dielectric film deposited under $N_2/(Ar+N_2)$ gas partial pressure of 75% exhibit the highest AlN (002) preferred orientation, which was grain size of about 15.32 nm and very dense structure. We suggest the possibilities of it's application as a dielectric layer for metal PCB because the AlN films prepared at optimized gas partial pressure can improving the insulating property, the thermal conductivity, and thermal diffusivity of the films.

Improvement of NBTI Lifetime Utilizing Optimized BEOL Process Flow (새로운 BEOL 공정을 이용한 NBTI 수명시간 개선)

  • Ho Won-Joon;Han In-Shik;Lee Hi-Deok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.3 s.345
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    • pp.9-14
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    • 2006
  • The dependence of NBTI lifetime on the BEOL processes such as sintering gas type and passivation layer has been characterized in depth. Then, optimized BEOL process scheme is proposed to improve NBTI lifetime. NBTI showed degradation due to the plasma enhanced nitride (PE-SiN) passivation film and $H_2$ sintering anneal. Then, new process scheme of $N_2$ annealing instead of $H_2$ annealing prior to PE-SiN deposition is proposed. The proposed BEOL process flow showed that NBTI lifetime can be improved a lot without degradation of device performance and NMOS hot carrier reliability.