• Journal of Power Electronics
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• 제10권2호
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• pp.146-154
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• 2010

In this paper two dual output current-type inverters are proposed. These inverters have been called a current source nines-witch inverter and a current-type z-source nine-switch inverter by the authors. The proposed inverters have two independent current source outputs. Compared to two independent current source inverters, the proposed converters are implemented with fewer semiconductor switches. Space vector modulation (SVM) is proposed for these converters. Simulation results show the validity and performance of the proposed inverters.

• Journal of Power Electronics
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• 제18권1호
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• pp.1-10
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• 2018

Recently, the nine-switch inverter has been proposed as a dual output inverter. To date, studies on the control strategies for NSIs have been mostly combined with their application. However, in this paper, a mathematical model and control strategy for nine-switch inverters has been proposed in view of the topology. A switching function model and equivalent circuit model of a nine-switch inverter have been built in ${\alpha}{\beta}$ coordinates. Then, a novel current observer with an improved integrator is proposed based on the switching function model, and a direct power control strategy is proposed. No current sensors are used in the proposed strategy, and only two voltage sensors are employed. The performance of the proposed control method is verified by simulation and experimental results.

• Journal of Power Electronics
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• 제14권1호
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• pp.48-60
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• 2014

Multilevel inverters have been widely used for high-voltage and high-power applications. Their performance is greatly superior to that of conventional two-level inverters due to their reduced total harmonic distortion (THD), lower switch ratings, lower electromagnetic interference, and higher dc link voltages. However, they have some disadvantages such as an increased number of components, a complex pulse width modulation control method, and a voltage-balancing problem. In this paper, a novel nine-level reduced switch cascaded multilevel inverter based on a multilevel DC link (MLDCL) inverter topology with reduced switching components is proposed to improve the multilevel inverter performance by compensating the above mentioned disadvantages. This topology requires fewer components when compared to diode clamped, flying capacitor and cascaded inverters and it requires fewer carrier signals and gate drives. Therefore, the overall cost and circuit complexity are greatly reduced. This paper presents modulation methods by a novel reference and multicarrier based PWM schemes for reduced switch cascaded multilevel inverters (RSCMLI). It also compares the performance of the proposed scheme with that of conventional cascaded multilevel inverters (CCMLI). Simulation results from MATLAB/SIMULINK are presented to verify the performance of the nine-level RSCMLI. Finally, a prototype of the nine-level RSCMLI topology is built and tested to show the performance of the inverter through experimental results.

• Journal of Power Electronics
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• 제9권4호
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• pp.593-603
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• 2009

This paper proposes and describes the design and operational principles of a three-phase three-level nine switch voltage source inverter. The proposed topology consists of three bi-directional switches inserted between the source and the full-bridge power switches of the classical three-phase inverter. As a result, a three-level output voltage waveform and a significant suppression of load harmonics contents are obtained at the inverter output. The harmonics content of the proposed multilevel inverter can be reduced by half compared with two-level inverters. A Fourier analysis of the output waveform is performed and the design is optimized to obtain the minimum total harmonic distortion. The full-bridge power switches of the classical three-phase inverter operate at the line frequency of 50Hz, while the auxiliary circuit switches operate at twice the line frequency. To validate the proposed topology, both simulation and analysis have been performed. In addition, a prototype has been designed, implemented and tested. Selected simulation and experimental results have been provided.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2018년도 전력전자학술대회
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• pp.105-107
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• 2018

This paper presents a new hybrid multilevel converter topology, which consists of a combination of the series connected switched capacitor units with boost ability, and an H-bridge with T-type bidirectional switches. The proposed converter boosts the input voltage without any bulky inductors, and has the small number of components, which can make the size and cost of a power converter greatly reduced. The output filter size and harmonics are also reduced by the high quality multilevel output. In addition, there is no need for complicated methods to balance the capacitor voltage. Simulation and experimental results with a nine-level converter system are presented to validate the proposed topology and modulation method.