• 한국재료학회지
• /
• 제14권11호
• /
• pp.769-774
• /
• 2004

15 nm-Co/15 nm-Ni/P-Si(100)[Type I] and 15 nm-Ni/15 nm-Co/P-Si(100)(Type II) bilayer structures were annealed using a rapid thermal annealer for 40sec at $700/sim1100^{\circ}C$. The annealed bilayer structures developed into composite NiCo silicides and resulting changes in sheet resistance, composition and microstructure were investigated using Auger electron spectroscopy and transmission electron microscopy. Prepared NiCoSix films were further treated in a sequential annealing set up from $900\sim1100^{\circ}C$ with 30 minutes. The sheet resistances of NiCoSix from Type I maintained less than $7\;{\Omega}/sq$. even at the temperature of $1100{\circ}C$, while those of Type II showed about $5\;{\Omega}/sq$. with the thinner and more uniform thickness. With the additive post annealing, the sheet resistance for all the composite silicides remained small up to $900^{\circ}C$. The proposed NiCoSix films were superior over the conventional single-phased silicides and may be easily incorporated into the sub-0.1 ${\mu}m$ process.

• 반도체디스플레이기술학회지
• /
• 제7권1호
• /
• pp.7-10
• /
• 2008

Effect of Pd addition on crystal structures of two nickel silicides, NiSi and $NiSi_2$, is investigated by using an ab initio calculation. A Pd atom substitutes a Ni and Si site, respectively, to evaluate the preferable site between them. Pd prefers Ni site to Si site in NiSi, while it prefers Si site to Ni site in $NiSi_2$. The calculated total energy also indicates that the Pd substitution to Si site stabilizes the $NiSi_2$ structure. This calculated data matches well with the experimental data obtained from Atom probe.

• 한국재료학회지
• /
• 제17권2호
• /
• pp.73-80
• /
• 2007

For the sub-65 nm CMOS process, it is necessary to develop a new silicide material and an accompanying process that allows the silicide to maintain a low sheet resistance and to have an enhanced thermal stability, thus providing for a wider process window. In this study, we have evaluated the property and unit process compatibility of newly proposed composite silicides. We fabricated composite silicide layers on single crystal silicon from $10nm-Ni_{1-x}Co_x/single-crystalline-Si(100),\;10nm-Ni_{1-x}Co_x/poly-crystalline-\;Si(100)$ wafers (x=0.2, 0.5, and 0.8) with the purpose of mimicking the silicides on source and drain actives and gates. Both the film structures were prepared by thermal evaporation and silicidized by rapid thermal annealing (RTA) from $700^{\circ}C\;to\;1100^{\circ}C$ for 40 seconds. The sheet resistance, cross-sectional microstructure, surface composition, were investigated using a four-point probe, a field emission scanning probe microscope, a field ion beam, an X-ray diffractometer, and an Auger electron depth profi1ing spectroscopy, respectively. Finally, our newly proposed composite silicides had a stable resistance up to $1100^{\circ}C$ and maintained it below $20{\Omega}/Sg$., while the conventional NiSi was limited to $700^{\circ}C$. All our results imply that the composite silicide made from NiCo alloy films may be a possible candidate for 65 nm-CMOS devices.

• 한국재료학회지
• /
• 제18권1호
• /
• pp.5-11
• /
• 2008

Thermally evaporated 10 nm-Ni/1 nm-Au/(30 nm-poly)Si structures were fabricated in order to investigate the thermal stability of Au-inserted nickel silicide. The silicide samples underwent rapid thermal annealing at $300{\sim}1100^{\circ}C$ for 40 seconds. The sheet resistance was measured using a four-point probe. A scanning electron microscope and a transmission electron microscope were used to determine the cross-sectional structure and surface image. High-resolution X-ray diffraction and a scanning probe microscope were employed for the phase and surface roughness. According to sheet resistance and XRD analyses, nickel silicide with Au had no effect on widening the NiSi stabilization temperature region. Au-inserted nickel silicide on a single crystal silicon substrate showed nano-dots due to the preferred growth and a self-arranged agglomerate nano phase due to agglomeration. It was possible to tune the characteristic size of the agglomerate phase with silicidation temperatures. The nano-thick Au-insertion was shown to lead to self-arranged microstructures of nickel silicide.

• 한국산학기술학회논문지
• /
• 제9권1호
• /
• pp.16-22
• /
• 2008

10nm Ni/30 nm와 70nm poly Si/200nm $SiO_2/Si(100)$ 구조로부터 니켈실리사이드의 열적안정성을 연구하기 위해서 쾌속열처리기를 이용하여 실리사이드화 온도 $300{\sim}1100^{\circ}C$에서 40초간 열처리하여 실리사이드를 제조하였다. 준비된 실리사이드의 면저항값 변화, 미세구조, 상 분석, 표면조도 변화를 각각 사점면저항측정기, FE-SEM, TEM, HRXRD, SPM을 활용하여 확인하였다. 30 nm 다결정실리콘 기판 위에 형성된 실리사이드는 $900^{\circ}C$까지 열적안정성이 있었다. 반면에 70 nm 다결정실리콘 기판 위에 형성된 실리사이드는 기존연구결과와 동일한 $700^{\circ}C$ 이상에서 고저항상인 $NiSi_2$로 상변화 하였다. HRXRD로 확인한 결과, 30 nm 두께의 기판 위에 니켈실리사이드는 $900^{\circ}C$ 고온에서도 NiSi상이 유지되다가 $1000^{\circ}C$에서 $NiSi_2$로 상변화 하였다. FE-SEM 과 TEM 관찰결과, 30 nm 두께의 다결정실리콘 기판에서는 $700^{\circ}C$의 저온처리에는 잔류 다결정실리콘 없이 매우 균일하고 평탄한 40 nm의 NiSi가 형성되었고, $1000^{\circ}C$에는 선폭 $1.0{\mu}m$급의 미로형 응집상이 생성됨을 확인하였다. 70 nm 두께의 다결정실리콘 기판에서는 불균일한 실리 사이드 형성과 잔류 다결정실리콘이 존재하였다. SPM결과에서 전체 실험구간에서의 RMS 표면조도 값도 17nm 이하로 CMOS공정의 FUSI게이트 적용의 가능성을 보여주었다. 다결정실리콘 게이트의 높이를 감소시키면 니켈실리사이드는 상안정화가 용이하며 저저항구간을 넓힐 수 있는 장점이 있었다.

• 한국전자현미경학회:학술대회논문집
• /
• 한국현미경학회 2007년도 제38차 춘계학술대회 초록집
• /
• pp.108-113
• /
• 2007

• 한국재료학회지
• /
• 제25권2호
• /
• pp.90-94
• /
• 2015

We prepared 8 samples of non-silver and silver-added master alloys containing silicon to confirm the existence of nickel-silicides. We then prepared products made of 14K and 18K white gold by using the prepared master alloys containing 0.25, 0.35, and 0.50 wt% silicon to check for nickel release. We then employed the EN 1811 testing standard to investigate the nickel release of the white gold products, and we also confirmed the color of the white gold products with an UV-VIS-NIR-color meter. We observed $NiSi_x$ residue in all master alloys containing more than 0.50 wt% Si with EDS-nitric acid etching. For the white gold products, we could not confirm the existence of $NiSi_x$ through XRD after aqua-regia etching. In the EN 1811 test, only the white gold products with 0.25 wt% silicon master alloys successfully passed the nickel release regulations. Moreover, we confirmed that our white gold products showed excellent Lab indices as compared to those of commercial white gold ones, and the silver-added master alloys offered a larger L index. Our results indicate that employing 0.25 wt% silicon master alloys might be suitable for white gold products without nickel-silicide defects and nickel release problems.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
• /
• pp.215-216
• /
• 2013

The silicide is a compound of Si with an electropositive component. Silicides are commonly used in silicon-based microelectronics to reduce resistivity of gate and local interconnect metallization. The popular silicide candidates, CoSi2 and TiSi2, have some limitations. TiSi2 showed line width dependent sheet resistance and has difficulty in transformation of the C49 phase to the low resistive C54. CoSi2 consumes more Si than TiSi2. Nickel silicide is a promising material to substitute for those silicide materials providing several advantages; low resistivity, lower Si consumption and lower formation temperature. Nickel silicide (NiSi) nanowire (NW) has features of a geometrically tiny size in terms of diameter and significantly long directional length, with an excellent electrical conductivity. According to these advantages, NiSi NWs have been applied to various nanoscale applications, such as interconnects [1,2], field emitters [3], and functional microscopy tips [4]. Beside its tiny geometric feature, NW can provide a large surface area at a fixed volume. This makes the material viable for photovoltaic architecture, allowing it to be used to enhance the light-active region [5]. Additionally, a recent report has suggested that an effective antireflection coating-layer can be made with by NiSi NW arrays [6]. A unique growth mechanism of nickel silicide (NiSi) nanowires (NWs) was thermodynamically investigated. The reaction between Ni and Si primarily determines NiSi phases according to the deposition condition. Optimum growth conditions were found at $375^{\circ}C$ leading long and high-density NiSi NWs. The ignition of NiSi NWs is determined by the grain size due to the nucleation limited silicide reaction. A successive Ni diffusion through a silicide layer was traced from a NW grown sample. Otherwise Ni-rich or Si-rich phase induces a film type growth. This work demonstrates specific existence of NiSi NW growth [7].

• 대한금속재료학회지
• /
• 제46권2호
• /
• pp.69-79
• /
• 2008

A composition consisting of 10 nm-Ni/1 nm-Pd/(30 nm or 70 nm-poly)Si was thermally annealed using rapid thermal for 40 seconds at $300{\sim}1100^{\circ}C$ to improve the thermal stability of conventional nickel monosilicide. The annealed bilayer structure developed into $Ni(Pd)Si_x$, and the resulting changes in sheet resistance, microstructure, phase, chemical composition, and surface roughness were investigated. The silicide, which formed on single crystal silicon, could defer the transformation of $NiSi_2$, and was stable at temperatures up to $1100^{\circ}C$. It remained unchanged on polysilicon substrate compared with the sheet resistance of conventional nickel silicide. The silicides annealed at $700^{\circ}C$, formed on single crystal silicon and 30 nm polysilicon substrates exhibited 30 nm-thick uniform silicide layers. However, silicide annealed at $1,000^{\circ}C$ showed preferred and agglomerated phase. The high resistance was due to the agglomerated and mixed microstructures. Through X-ray diffraction analysis, the silicide formed on single crystal silicon and 30 nm polysilicon substrate, showed NiSi phase on the entire temperature range and mixed phases of NiSi and $NiSi_2$ on 70 nm polysilicon substrate. Through scanning probe microscope (SPM) analysis, we confirmed that the surface roughness increased abruptly until 36 nm on 30 nm polysilicon substrate while not changed on single crystal and 70 nm polysilicon substrates. The Pd-inserted nickel monosilicide could maintain low resistance in a wide temperature range and is considered suitable for nano-thick silicide processing.

• 한국산학기술학회논문지
• /
• 제9권2호
• /
• pp.303-310
• /
• 2008

ICP-CVD(inductively-coupled Plasma chemical vapor deposition)를 사용하여 $250^{\circ}C$기판온도에서 140 nm 두께의 수소화된 비정질 실리콘(${\alpha}$-Si:H)을 제조하였다. 그 위에 30 nm-Ni을 열증착기를 이용하여 성막하고, $200{\sim}500^{\circ}C$ 사이에서 $50^{\circ}C$간격으로 30분간 진공열처리하여 실리사이드화 처리하였다. 완성된 실리사이드의 처리온도에 따른 실리사이드의 면저항값 변화, 미세구조, 상 분석, 표면조도 변화를 각각 사점면저항측정기, HRXRD(high resolution X-ray diffraction), FE-SEM(field emission scanning electron microscope), TEM(transmission electron microscope), SPM(scanning probe microscope)을 활용하여 확인하였다. $300^{\circ}C$에는 고저항상인 $Ni_3Si$, $400^{\circ}C$에서는 중저항상인 $Ni_2Si$, $450^{\circ}C$이상에서 저저항의 나노급 두께의 균일한 NiSi를 확인되었다. SPM결과에서 저저항 상인 NiSi는 $450^{\circ}C$에서 RMS(root mean square) 표면조도 값도 12 nm이하로 전체 공정온도를 $450^{\circ}C$까지 낮추어 유리와 폴리머기판 등 저온기판에 대응하는 저온 니켈모노실리사이드 공정이 가능하였다.