• The Transactions of the Korean Institute of Power Electronics
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• v.18 no.2
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• pp.123-130
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• 2013

This paper proposes the switched trans Z-source inverter(STZSI) which combined the characteristics of the trans Z-source inverter(TZSI) and the switched inductor Z-source inverter(SLZSI). The proposed STZSI has the same performance compared with the SLZSI which is improved the voltage boost performance of the conventional typical X-shaped ZSI, and it has advantage that circuit structure of Z-impedance network is more simple. And, in order to step up the voltage boost factor under the condition of the same duty ratio, unlike the SLZSI adding the inductors and diodes, the proposed method is dune by changing the turn ratio of trans primary winding of Z-impedance network. To confirm the validity of the proposed method, PSIM simulation and a DSP(TMS320F28335) based experiment were performed using trans with turn ratio 1 and 2 under the condition of the input DC voltage VI=50V, duty ratio D=0.1 and D=0.15. As a result, under the same input/ouput condition, the inverter arm voltage stress of the proposed method is reduced to about 15%-22% as compared with typical X-shaped ZSI, and the elements in Z-impedance network of the proposed method is reduced as compared with the SLZSI.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.21 no.1
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• pp.560-567
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• 2020

Incremental Sheet Forming (ISF) is a unique sheet-forming technique. The process is a die-less sheet metal manufacturing process for rapid prototyping and small batch production. In the forming process, the critical parameters affecting the formability of sheet materials are the tool diameter, step depth, feed rate, spindle speed, etc. This study examined the effects of these parameters on the formability in the forming of the varying wall angle conical frustum model for a pure Al3004 sheet with 1mm in thickness. Using Minitab software based on Back Propagation Neural Network (BPNN) and Genetic Algorithm (GA), a second order mathematical prediction model was established to predict and optimize the wall angle. The results showed that the maximum forming angle was 87.071° and the best combination of these parameters to give the best performance of the experiment is as follows: tool diameter of 6mm, spindle speed of 180rpm, step depth of 0.4mm, and feed rate of 772mm/min.

• Journal of Korean Society of Rural Planning
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• v.11 no.1 s.26
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• pp.1-8
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• 2005

The purpose of this study is to develop a simulation model of rural road path for infrastructure of green-tourism and public service in rural areas. This study makes an objective function for moving cost minimization considering car travel time according to road characteristics, which can route the optimal shortest road paths between the center places and all rear villages, based on GIS coverages of road-village network for connecting between center places and rural villages as input data of the model. In order to verify the model algorithm, a homogeneous hexagonal network, assuming distribution of villages with same population density and equal distance between neighborhood villages on a level plane area, was tested to simulate the optimal paths between the selected center nodes and the other rear nodes, so that the test showed reasonable shortest paths and road intensity defined in this study. The model was also applied to the actual rural area, Ucheon-myun, which is located on Hoengsung-gun, Kangwon-do, with 72 rural villages, a center village (Uhang, 1st center place) in the area, a county conte. (Hoengsung-eup, 2nd center place), and a city (Wonju, 3rd center place), as upper settlement system. The three kinds of conte. place, Uhang, Hoengsung-eup, and Wonju, were considered as center places of three scenarios to simulate the optimal shortest paths between the centers and rural villages, respectively. The simulation results on the road-village network with road information about pavement and width of road show that several spans having high intensity of road are more important that the others, while some road spans have low intensity of road.

• Asia-pacific Journal of Multimedia Services Convergent with Art, Humanities, and Sociology
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• v.6 no.3
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• pp.413-422
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• 2016

A construction manager tries to complete a construction project within its duration and budget using available resources. Schedule networks such as Bar-chart and CPM(critical path method) are used to finish the project within the duration. A survey shows that small contractors prefer Microsoft Excel to commercial time management softwares to manage construction time in their fields, because the Excel is useful to control cost with schedule and few time management experts works in the small contractors. A college produces talented graduates who are able to manage time of a construction project. But the quality and quantity of college eduction for time management is insufficient. Another survey shows that majors in Architectural engineering of local national universities have the curriculum for time management, and teach mainly the theory of network scheduling and how to make the network schedule. The several majors have classes for the theory and exercise of commercial time management softwares in several majors. It is necessary to educate time management experts able to use Bar-chart and commercial time management softwares for the small contractors.

• Journal of the Korean Society for Precision Engineering
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• v.29 no.12
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• pp.1376-1381
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• 2012

Optical devices are used extensively in the field of information network. Increasing demand for optical device, optical interconnection has been a important issue for commercialization. However many problems exist in the interconnection between optical device and optical fiber, and in the case of the multi-channel, problems of the optical alignment and optical array arise. For solving the alignment and array problem of optical device and the optical fiber, we fabricated fiber alignment and array by using imprint technology. Achieved higher precision of optical fiber alignment and array due to fabricating using imprint technology. The silicon stamp with different depth was fabricated using the conventional photolithography. Using the silicon stamp, a nickel stamp was fabricated by electroforming process. We conducted imprint process using the nickel stamp with different depth. The optical alignment and array by fabricating the patterns of optical device and fiber alignment and array using imprint process, and achieved higher precision of decreasing the dimensional error of the patterns by optimization of process. The fabricated optical interconnection of PLC device was measured 3.9 dB and 4.2 dB, lower than criteria specified by international standard.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.11
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• pp.116-123
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• 1994

A novel opto-digital pattern recognition method which has shift, rotation, and scale invariant properties is proposed for recognizing two dimensional images having straight lines. The algorithm is composed of three stages. In the first stage the line features of the image are extracted. The second stage imposes the shift, rotation, and scale invariant properties on the extracted features through normalizing procedure. The required normalizing equations are analytically explained. In the last stage, the artificial feedforward neural network is trained with the extracted features. In order to evaluated the proposed algorithm, nine different edge enhnaced binary images composed of straight lines are tested. Thus the proposed algorithm can recognize the patterns event though they are shifted, rotated, and scaled.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.8
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• pp.68-76
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• 1998

In this paper, a new morphological image segmentation algorithm of hierarchical structure by binary split is proposed. It splits a region with the lowest quality into two regions using only two markers having the highest contrast. Therefore, it improves the quality of image with limited regions and reduces contour information which is not sensitive to human visual system, when compared with the conventional algorithm. It is appropriate to PSTN, LAN, and mobile networks, of which the available transmission bandwidth is very limited, because the number of regions can be controlled. And the proposed algorithm shows very simple structure because it doesn't need post processing to eliminate small regions and reduces much computation by using only structuring element of small size at simplification step of each hierarchical structure when compared with the conventional algorithm.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.15 no.5
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• pp.3-11
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• 2005

This paper presents a performance analysis model based on an M/M/1 queue and Poisson distribution of input data traffic. The simulation on a pipelined AES system with processing rate of 10 rounds per clock shows $4.0\%$ higher performance than a non-pipelined version consuming 10 clocks per transaction. Physical implementation of pipelined AES with FPGA takes 3.5 times bigger gate counts than the non-pipelined version whereas the pipelined version yields only $3.5\%$ performance enhancement. The proposed analysis model can be used to optimize cost-performance of AES hardware designs.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.1545-1549
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• 2005

According as computer is supplied in a lot of homes and offices and Internet use increases, various service based on the Internet. Including wireless PDA in the future, many devices such as Internet telephone, TV, refrigerator and oven will be connected on the Internet and Internet address exhaustion will be raised to serious problem gradually. Today, the IPv4 address exhaustion problem has been solved partially using NAT (Network Address Translation) however, the transition to next Generation Internet will be accelerated because of advantages such as mobility, security service, QoS, and abundant IP addresses. In IPv6, all hosts are designed to create and set their address automatically without manager's intervention using Neighbor Discovery Protocol. But, when an IPv6 host sets its address automatically, there are serious security vulnerabilities. In this paper, we analysis security vulnerabilities in auto-configuration and provide security requirements for secure auto-configuration.

• Proceedings of the KIEE Conference
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• 1997.11a
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• pp.193-196
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• 1997

This paper presents the Fault Pattern Estimator(FPE) using the neural network for the protection of the T/L. The proposed FPE has two neural network parts of the fault-types classification and the fault-location estimation. It can detect the fault signals more Quickly and accurately. To prove the performance of the FPE, we have tested using a relaying signals obtained from the EMTP simulations.