• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.6
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• pp.384-392
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• 2003

The algorithm for calculating the base-collector breakdown voltage of NPN BJT for integrated circuits is proposed. The method of three-dimensional mesh generation to minimize the time required for device simulation is presented and the method for calculating the breakdown voltage using solutions of the Poisson´s equation is presented. To verify the proposed method, the breakdown voltage between base and collector of NPN BJT using 20V process and 30V process is compared with the measured data. The breakdown voltage from the proposed method of NPN BJT using 20V process shows an averaged relative error of 8.0% compared with the measured data and the breakdown voltage of NPN BJT using 30V process shows an averaged relative error of 4.3% compared with the measured data.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.52 no.2
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• pp.67-73
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• 2003

The algorithm (or calculating the base-collector breakdown voltage of NPN BJT(Bipolar Junction Transistor) for integrated circuits is Proposed. The method for calculating the electric field using the solution of Poisson's equation is presented and the method for calculating the breakdown voltage using the integration of ionization coefficients is presented. The base-collector breakdown voltage of NPN BJT using 20V process obtained from the proposed method shows an averaged relative error of 8.0% compared with the measured data and the base-collector breakdown voltage of NPN BJT using 30V process shows an averaged relative error of 4.3% compared with the measured data

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.4
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• pp.13-20
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• 2003

The model of the transistor saturation current of the BJT for integrated circuits based upon the semiconductor physics is proposed. The method for calculating the doping profile in the base region using process conditions is presented and the method for calculating the base Gummel number of lateral PNP BJT and vertical NPN BJT is proposed. The transistor saturation currents of NPN BJT using 20V and 30V process conditions obtained from the proposed method show an average relative error of 6.7% compared with the measured data and the transistor saturation currents of PNP BJT show an average relative error of 6.0% compared with the measured data.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.4
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• pp.417-421
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• 1988

In order to analyze the blooming suppression mechanism of a MOS image sensor, test photodiodes have been fabricated and characterized by attaching a source follower circuit. The blooming suppression ability of npn structure compared to that of np structure is quantitatively analyzed and measured by experiment. The dependency of the blooming current on the substrate voltage, the vertical MOS gate voltage and the video voltage is measured and the optimum condition for blooming suppression is presented.

• Journal of the Korean Institute of Telematics and Electronics
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• v.3 no.4
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• pp.25-32
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• 1966

A silicon planar npn transistor has been fabricated. These transistors show three different characteristics, which are obtained with the variation of drive in time after the boron base diffusion. They are as follows:

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.11a
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• pp.5-8
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• 1998

기존의 바이폴라 논리회로에서 신호변환시 베이스 영역의 소수 캐리어를 빨리 제거 하기 위해서, 베이스 부분의 매몰충을 줄여서 npn트랜지스터의 베이스와 에피충과 기판사이에 병합 pnp 트랜지스터를 생성한 트랜지스터와 게이트 당 전달 지연 시간을 측정하기 위한 링-발진기를 설계, 제작하였다. 게이트의 구조는 수직 npn 트랜지스터와 기판과 병합 pnp 트랜지스터이다. 소자 시뮬레이션의 자료를 얻기 위하여 수직 npn 트랜지스터와 병합 pnp 트랜지스터의 전류-전압 특성을 분석하여 특성 파라미터를 추출하였다. 결과로서 npn 트랜지스터의 에미터의 면적이 기존의 접합넓이에 비해서 상당히 적기 때문에 에미터에서 진성베이스로 유입되는 캐리어와 가장자리 부분으로 유입되는 캐리어가 상대적으로 많기 때문에 이 많은 양은 결국 베이스의 전류가 많이 형성되며, 또 콜렉터의 매몰층이 거의 반으로 줄었기 때문에 콜렉터 전류가 적게 형성되어 이득이 낮아진다. 병합 pnp 트랜지스터는 베이스폭이 크고 농도 분포에서 에미터의 농도와 베이스의 농도 차이가 적기 때문에 전류 이득이 낮아졌다. 게이트를 연결하여 링-발진기를 제작하여 측정한 AC특성의 출력은 정현파로 논리전압의 진폭은 200mV, 최소 전달 지연시간은 211nS이며, 게이트당 최소 전달지연 시간은 7.26nS의 개선된 속도 특성을 얻었다.

• Journal of the Korean Institute of Telematics and Electronics
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• v.16 no.2
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• pp.7-14
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• 1979

Design considerations of I2L are discussed with particular emphasis on the upward current gain of the npn transistor, 6J Several test structures have been fabricated to measure the DC and AC characteristics of the I2L basic cell and the base current components of the npn transistor. A T flip-flop has also been designed and fabricated using the I2L technology. The upward current gain of 10 the speed -power product of the 2.6pJ/gate and the minimum propagation delay time of 36 nsec have been obtained from the test structure. The maxmum toggle frequency of the T flip -flop has been measured to be 3.5 MHz.

• Proceedings of the KIEE Conference
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• 2002.11a
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• pp.137-140
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• 2002

The algorithm for calculating the base-collector breakdown voltage of NPN BJT(Bipolar Junction Transistor) for integrated circuits is proposed. The method for calculating the electric field using the solution of Poisson's equation is presented and the method for calculating the breakdown voltage using the integration of ionization coefficients is presented. The base-collector breakdown voltage of NPN BJT using 20V process obtained from the proposed method shows an averaged relative error of 8.0% compared with the measured data.

• The Korean Journal of Nuclear Medicine
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• v.2 no.1
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• pp.27-41
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• 1968

The ferrokinetics and red cell life spans of the patients with chronic glomerulonephritis were investigated by the double tracing method using radioactive iron ($^{59}Fe$) and chromium ($^{51}Cr$). According to the serum NPN levels, the patients were subdivided into 3 groups: Group 1. 6 patients, had the levels below 40 mg/dl Group 2. 6 patients, had the levels between 41 mg/dl to 80 mg/dl Group 3. 10 patients, had the levels above 80 mg/dl The results were as follows: 1) Red blood cell-, hematocrit- and hemoglobin values were moderately reduced in patients with normal serum NPN levels, while markedly reduced in patients with elevated serum NPN levels. 2) The plasma volume was increased, while the red cell volume was decreased in patients with elevated serum NPN levels, hence, total blood volume was unchanged. 3) The serum iron level was slightly reduced h patients of groups 1 and 2, while was within the normal ranges in patients of group 3. 4) i) In patients with normal serum NPN levels, the plasma iron disappearance rate, red cell iron utilization rate, red cell iron turnover rate, daily red cell iron renewal rate, circulating red cell iron and red cell iron concentration were within the normal ranges, while the plasma iron turnover rate was slightly reduced. ii) In patients with elevated serum NPN levels, the plasma iron disappearance rate was delayed, while the plasma iron turnover rate was within the normal ranges. The red cell iron utilization rate, red cell iron turnover rate and circulating red cell iron were decreased and the period in which the red cell iron utilization rate reachd its peak was delayed in Group 3 patients. The daily red cell iron renewal rate and the red cell iron concentration were unchanged. iii) The mean red cell life span was within the normal ranges in patients with normal serum NPN levels, while was shortened in patients with elevated serum NPN levels.

• Journal of Korea Society of Industrial Information Systems
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• v.19 no.2
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• pp.37-43
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• 2014

In this paper, we present the effect of forward current gain on emitter area in NPN transistors are used widely in the almost linear integrated circuits and integrated injection logic. Relations between forward current gain and emitter area were conformed with the simulation with examined calculation and experiments. At the same emitter length, as junction depth is increased, common emitter current gain is decreased. Ratio of Emitter bottom area comparing to side area increases, the emitter current gain is increased. The theory and simulation results were fitted in with the experimental data very well.