• 제목/요약/키워드: NEC

검색결과 233건 처리시간 0.037초

Synbiotics use for preventing sepsis and necrotizing enterocolitis in very low birth weight neonates: a randomized controlled trial

  • Pehlevan, Ozge Serce;Benzer, Derya;Gursoy, Tugba;Karatekin, Guner;Ovali, Fahri
    • Clinical and Experimental Pediatrics
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    • 제63권6호
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    • pp.226-231
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    • 2020
  • Background: Probiotics and prebiotics have strain-specific effects on the host. Synbiotics, a mixture of probiotics and prebiotics, are proposed to have more beneficial effects on the host than either agent has alone. Purpose: We performed a randomized controlled trial to investigate the effect of Lactobacillus and Bifidobacterium together with oligosaccharides and lactoferrin on the development of necrotizing enterocolitis (NEC) or sepsis in very low birth weight neonates. Methods: Neonates with a gestational age ≤32 weeks and birth weight ≤1,500 g were enrolled. The study group received a combination of synbiotics and lactoferrin, whereas the control group received 1 mL of distilled water as placebo starting with the first feed until discharge. The outcome measures were the incidence of NEC stage ≥2 or late-onset cultureproven sepsis and NEC stage ≥2 or death. Results: Mean birth weight and gestational age of the study (n=104) and the control (n=104) groups were 1,197±235 g vs. 1,151±269 g and 29±1.9 vs. 28±2.2 weeks, respectively (P>0.05). Neither the incidence of NEC stage ≥2 or death, nor the incidence of NEC stage ≥2 or late-onset culture-proven sepsis differed between the study and control groups (5.8% vs. 5.9%, P=1; 26% vs. 21.2%, P=0.51). The only significant difference was the incidence of all stages of NEC (1.9% vs. 10.6%, P=0.019). Conclusion: The combination of synbiotics and lactoferrin did not reduce NEC severity, sepsis, or mortality.

Au-Au Flip Chip Mounting Technology by NEC

  • Hino, Shigekazu
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2000년도 2nd Korea-Japan Advanceed Semiconductor Packaging Technology Seminar
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    • pp.105-129
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    • 2000
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A Method for Reducing the Number of Metal Layers for Embedded LSI Package

  • 오시마다이스케;모리켄타로;나카시마요시키;키쿠치카츠미;야마미치신다로
    • 마이크로전자및패키징학회지
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    • 제17권4호
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    • pp.27-33
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    • 2010
  • We have successfully demonstrated a high-pin-count and thin embedded-LSI package to realize next generation's mobile terminals. The following three design key points were applied: (i) Using Cu posts, (ii) Using the coreless structure, (iii) Using a Cu plate as the ground plane. In order to quantitatively determine the contribution of the three points, the five-stage process for reducing the number of metal layers is described by means of the electrical simulation. The point-(i) and (ii) are effective from the viewpoint of the power integrity (PI); that is, these points play important roles in reducing the number of metal layers, and especially the point-(ii) contributes at least twice as the point-(i). The point-(iii) is not effective in the PI, but has a few effects on the signal integrity (SI). For reducing the number of metal layers, we should, at first, pay attention whether the PI characteristics fulfill the specification, and then we should confirm the SI characteristics.

Necrotizing enterocolitis in newborns: update in pathophysiology and newly emerging therapeutic strategies

  • Choi, Young Youn
    • Clinical and Experimental Pediatrics
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    • 제57권12호
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    • pp.505-513
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    • 2014
  • While the survival of extremely premature infants with respiratory distress syndrome has increased due to advanced respiratory care in recent years, necrotizing enterocolitis (NEC) remains the leading cause of neonatal mortality and morbidity. NEC is more prevalent in lower gestational age and lower birth weight groups. It is characterized by various degrees of mucosal or transmural necrosis of the intestine. Its exact pathogenesis remains unclear, but prematurity, enteral feeding, bacterial products, and intestinal ischemia have all been shown to cause activation of the inflammatory cascade, which is known as the final common pathway of intestinal injury. Awareness of the risk factors for NEC; practices to reduce the risk, including early trophic feeding with breast milk and following the established feeding guidelines; and administration of probiotics have been shown to reduce the incidence of NEC. Despite advancements in the knowledge and understanding of the pathophysiology of NEC, there is currently no universal prevention measure for this serious and often fatal disease. Therefore, new potential techniques to detect early biomarkers or factors specific to intestinal inflammation, as well as further strategies to prevent the activation of the inflammatory cascade, which is important for disease progression, should be investigated.

NEC 시스템에서의 컴파일 속도 향상을 위한 크로스 컴파일러 서버 구현 (The Implementation of Cross Compiler Server for Speed up in NEC System)

  • 이영주;성진우;김성준;이상동;김중권
    • 한국정보처리학회:학술대회논문집
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    • 한국정보처리학회 2005년도 춘계학술발표대회
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    • pp.365-368
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    • 2005
  • 슈퍼컴퓨퍼 시스템의 종류에는 크게 벡터 시스템과 스칼라 시스템으로 두 가지 방식으로 나눌 수 있다. 이는 명령어 처리 형태로 구분한 것으로서, 현재 KISTI에서 보유하고 있는 슈퍼컴퓨터인 NEC 컴퓨터는 벡터 시스템으로서 명령어의 수행을 파이프라인 방식으로 처리한다. 벡터 시스템에서 컴파일을 수행할 때는 일반 명령 처리 장치에서 스칼라 형태로 수행되기 때문에 그 처리 속도가 저하되어 다른 스칼라 전용 컴퓨터보다 속도가 느리고 부하가 많이 발생하는 문제점을 안고 있다. 이러한 벡터 컴퓨터의 컴파일 속도를 향상시키기 위해서 크로스 컴파일 서버를 구축하고 이 서버를 NEC 시스템과 연계하여 빠르고 쉽게 크로스 컴파일을 수행할 수 있도록 하였다. 본 연구는 크로스 컴파일러 서버를 구축하고 이 서버에서 자동적으로 크로스 컴파일이 가능하게 함으로서 사용자가 기존의 컴파일 방식처럼 편리하게 이용할 수 있고, NEC 메인 시스템에 부하를 주지 않으면서 컴파일 속도의 성능을 향상할 수 있다.

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연속웨이블렛 변환을 이용한 구조물의 손상도 평가 (Damage Evaluation of a Structure Using Continuous Wavelet Transform)

  • 김한상;김현수
    • 한국구조물진단유지관리공학회 논문집
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    • 제12권6호
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    • pp.140-146
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    • 2008
  • 본 논문에서는 연속웨이블렛 변환(Continuous Wavelet Transform; CWT)을 이용하여 구조물의 손상도를 평가 하였다. 지진하중을 받은 프레임 구조물의 응답 가속도를 CWT를 이용하여 분해한 후 각각의 스케일에 관해서 손상전과 손상후의 정규화된 에너지 곡률(Normalized Energy Curvature; NEC)을 계산하였다. 손상전과 손상후의 NEC 값은 손상된 부재에서 크게 변화 하여 손상된 부재를 쉽게 나타내었고 또한 손상도가 심할 수 록 그 값의 차이가 컸다. 이 논문에서는 CWT로부터 계산된 NEC값이 구조물의 손상위치와 손상도를 평가하는 효과적인 지표임을 나타내었다.

Rectangle Region Based Stereo Matching for Building Reconstruction

  • Wang, Jing;Miyazaki, Toru;Koizumi, Hirokazu;Iwata, Makoto;Chong, Jong-Wha;Yagyu, Hiroyuki;Shimazu, Hideo;Ikenaga, Takeshi;Goto, Satoshi
    • Journal of Ubiquitous Convergence Technology
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    • 제1권1호
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    • pp.9-17
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    • 2007
  • Feature based stereo matching is an effective way to perform 3D building reconstruction. However, in urban scene, the cluttered background and various building structures may interfere with the performance of building reconstruction. In this paper, we propose a novel method to robustly reconstruct buildings on the basis of rectangle regions. Firstly, we propose a multi-scale linear feature detector to obtain the salient line segments on the object contours. Secondly, candidate rectangle regions are extracted from the salient line segments based on their local information. Thirdly, stereo matching is performed with the list of matching line segments, which are boundary edges of the corresponding rectangles from the left and right image. Experimental results demonstrate that the proposed method can achieve better accuracy on the reconstructed result than pixel-level stereo matching.

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Globalization of Korean Electrical Installations Standards and Codes Based on Comparison of IEC 60364 with NFPA

  • Ki, Chung-Young;Ro, Kwak-Hee;Seop, Shin-Hyo;Joo, Nam-Taik
    • 한국화재소방학회:학술대회논문집
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    • 한국화재소방학회 2001년도 추계학술대회 논문집
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    • pp.118-125
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    • 2001
  • Most of the laws and standards relevant to technology in Korea bear a resemblance to those in Japan. Electricity was not introduced to Korea until Lighting ceremony in Kyong-Bok palace observed in 1887. Since Korea was annexed to Japan in 1910 and our public works were under Japan control we have applied Japanese laws and regulations made by Chosun government-general. Independently from Japan the power electricity accepted power plants of USA, codes of NESC, ASME / ANSI, NEMA. Our generation and distribution system takes American style while our consumer side takes Japanese style. As global trade system was transferred GATT into WTO, the harmonization of technological standards, certification construction testing in the trend of world. This paper is based on WTO / TBT agreement coming in effect after 12th, April, 1979. For Korea the distribution system has a strong resemblance to American system so that unconvertible because IEC 60364 originated from Europe while NEC originated from USA. This papers deals with the fundamental elements of electrical safety system with comparing IEC 60364 with NEC. This paper considers how engineers should apply NFPA 70(NEC) and IEC based on the comparison of NEC to IEC in relation to electrical installations.

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NEC 시스템에서 크로스 컴파일러 자동화 구현 (The Implementation of Automatic with Cross Compiler in NEC System)

  • 이영주;성진우;장지훈;이혁로
    • 한국정보처리학회:학술대회논문집
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    • 한국정보처리학회 2009년도 추계학술발표대회
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    • pp.809-810
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    • 2009
  • 컴퓨터 시스템의 프로세스 종류는 크게 벡터 시스템과 스칼라 시스템의 두 가지 방식으로 나눌 수 있다. 이는 명령어 처리 방식을 구분한 것으로서 벡터 시스템은 명령어의 처리를 벡터 파이프라인 방식으로 수행한다. 이러한 벡터 시스템은 일반 명령어를 처리할 때는 명령어 실행을 벡터화하여 처리하기 때문에 속도가 향상되지만 반면에 컴파일을 수행할 때는 일반 명령 처리장치에서 스칼라 형태로 처리되기 때문에 그 처리 속도가 저하된다. 이러한 벡터 시스템에서의 컴파일 속도를 개선하기 위하여 별도의 크로스 컴파일러를 사용하는데, 이 때 별도의 크로스 컴파일 서버의 사용을 자동화하여 편리하게 사용할 수 있도록 구성하였다. 벡터 방식은 주로 Cray, NEC, Fujitsu 등의 컴퓨터에 채용하고 있으며 현재 KISTI에서 보유하고 있는 NEC 컴퓨터는 벡터 시스템이다. 본 연구는 크로스 컴파일러 서버를 구축하고 이 서버를 이용하여 자동적으로 크로스 컴파일을 함으로서 사용자는 기존의 일반 컴파일 방식과 동일하게 이용할 수 있기 때문에 사용하기 편리하고 NEC 메인 시스템에 부하를 주지 않으면서 컴파일 속도의 성능 향상을 가져오는 구성 방법을 제시한다.

Junction, Circuit and System Developments for a High-Tc Superconductor Sampler

  • Hidaka, M.;Satoh, T.;Tahara, S.
    • 한국초전도학회:학술대회논문집
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    • 한국초전도학회 1999년도 High Temperature Superconductivity Vol.IX
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    • pp.13-15
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    • 1999
  • A Josephson sampler circuit using high-Tc superconductor (HTS) ramp-edge junctions has been designed, fabricated, and experimentally tested. It consists of five ramp-edge junctions with a stacked groundplane and is based on single-flux-quantum (SFQ) operations. The sampler was used to measure current waveforms at picosecond and microampere resolutions. We are developing a system based on the sampler for measuring the current waveform in a room-temperature sample. And measuring current flowing through wiring in a semiconductor large-scale integrated circuit is a promising application for the HTS sampler system.

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