• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.3
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• pp.166-173
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• 2009

The reliability of hafnium oxide gate dielectrics incorporating lanthanum (La) is investigated. nMOSFETs with metal/La-doped high-k dielectric stack show lower $V_{th}$ and $I_{gate}$, which is attributed to the dipole formation at the high-k/$SiO_2$ interface. The reliability results well correlate with the dipole model. Due to lower trapping efficiency, the La-doping of the high-k gate stacks can provide better PBTI immunity, as well as lower charge trapping compared to the control HfSiO stacks. While the devices with La show better immunity to positive bias temperature instability (PBTI) under normal operating conditions, the threshold voltage shift (${\Delta}V_{th}$) at high field PBTI is significant. The results of a transconductance shift (${\Delta}G_m$) that traps are easily generated during high field stress because the La weakens atomic bonding in the interface layer.

• Journal of KIISE:Software and Applications
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• v.26 no.8
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• pp.1028-1038
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• 1999

본 논문에선 LR 문법의 부분 클래스를 동치인 LL 문법으로 변환하는 방법을 제시한다. 이 변환이 적용 가능한 문법을 확장된k`-transformable 문법이라 정의한다. 변환된 문법은 left-to-right 커버의 성질을 만족한다. 기존 연구에서 제시한 변환 방법은 LR 문법의 부분 클래스인 {{{{k`-transformable 클래스와 PLR 클래스를 LL 문법으로 바꾼다. 이 논문에서 제시하는 새로운 변환 방법의 적용 가능한 문법의 범위는 k`-transformable 클래스와 PLR 클래스를 포함한다. 기존의 커버링 성질을 만족하는 LL로의 문법 변환은 보편적인 LR 파서의 행동을 시뮬레이션하여 얻어진다. 이 과정에서 쉬프트, 리듀스 행동 이외에 무한의 가능성을 가진 스택 스트링의 유한 표현을 위해 리덕션 심볼에 대한 예상 행동이 추가된다. 본 논문에서는 파싱 문맥을 나타내는 LR 아이템들을 기존의 스택 스트링 표현 형태에 추가하여 스택 스트링 표현법을 정제하고, 리덕션 심볼에 대한 예상 방법을 확장하는 정형식을 제시한다. 이에 근거하여 LL 커버링 문법이 존재하는 클래스를 확장된 {{{{k`-transformable 문법으로 확장시킨다.Abstract A new transformation of a subclass of LR(k`) grammars into equivalent LL(k`) grammars is studied. The subclass of LR(k`) grammars is called extended k`-transformable. The transformed LL(k`) grammars left-to-right cover the original LR(k`) grammars. Previous transformations transform k`-transformable and PLR(k`) into LL(k`). The new transformation is more powerful in that it handles the extended k`-transformable subclass of LR(k`), which strictly includes k`-transformable and PLR(k`) classes. The previous covering transformations into LL grammars are obtained by simulating the actions of the conventional LR parser. Specially, a predict action of reduction goals is added to the action set in order to finitely represent stack string. In this paper, the stack string representation is refined by adding LR items to represent a parsing context, and the prediction of reduction goal is extended by generalizing the prediction formalism. Based on them, the previous grammar classes with LL({{{{k`) covering grammars are extended to extended k`-transformable grammars.

• Journal of Sensor Science and Technology
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• v.29 no.5
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• pp.354-359
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• 2020

The high vacuum hermetic sealing technique ensures excellent performance of MEMS resonators. For the high vacuum hermetic sealing, the customization of anodic bonding equipment was conducted for the glass/Si/glass triple-stack anodic bonding process. Figure 1 presents the schematic of the MEMS resonator with triple-stack high-vacuum anodic bonding. The anodic bonding process for vacuum sealing was performed with the chamber pressure lower than 5 × 10^-6 mbar, the piston pressure of 5 kN, and the applied voltage was 1 kV. The process temperature during anodic bonding was 400 ℃. To maintain the vacuum condition of the glass cavity, a getter material, such as a titanium thin film, was deposited. The getter materials was active at the 400 ℃ during the anodic bonding process. To read out the electrical signals from the Si resonator, a vertical feed-through was applied by using through glass via (TGV) which is formed by sandblasting technique of cap glass wafer. The aluminum electrodes was conformally deposited on the via-hole structure of cap glass. The TGV process provides reliable electrical interconnection between Si resonator and aluminum electrodes on the cap glass without leakage or electrical disconnection through the TGV. The fabricated MEMS resonator with proposed vacuum packaging using three-layer anodic bonding process has resonance frequency and quality factor of about 16 kHz and more than 40,000, respectively.

• KIISE Transactions on Computing Practices
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• v.22 no.6
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• pp.296-301
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• 2016

Object-based storage is an efficient storage solution that can handle unstructured data and shows better security and scalability than traditional block-based storage. However, in terms of power management, Object-based storage writes multiple copies in storage cluster, hence many servers consume unnecessary power in idle state. In order to resolve this problem, it is necessary to apply power management strategy by adjusting power mode of servers in idle state according to their workloads. In this paper, we proposed a new dynamic power management (DPM) method to transform power mode of storage servers dynamically according to workload information sent from proxy server. The experimental result shows that the proposed power management technic reduces total power consumption by 12% in the OpenStack based Swift object storage.

• Journal of IKEEE
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• v.20 no.4
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• pp.361-366
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• 2016

This paper presents the ESD protection circuit with improved electrical characteristic and area efficiency. The proposed ESD protection circuit has higher holding voltage and lower trigger voltage characteristics than the 3-Stacking LVTSCR. In addition, it has only two stages and has improved Ron characteristics due to short discharge path of ESD current. We analyzed the electrical characteristics of the proposed ESD protection circuit by TCAD simulator. The proposed ESD protection circuit has a small area of about 35% compared with 3-Stacking LVTSCR, The proposed circuit is designed to have improved latch-up immunity by setting the effective base length of two NPN parasitic bipolar transistors as a variable.

• Economic and Environmental Geology
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• v.43 no.4
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• pp.349-358
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• 2010

For imaging complex subsurface structures such as salt dome, faults, thrust belt, and folds, seismic prestack reverse-time migration in depth domain is widely used, which is performed by the cross-correlation of shot-domain wavefield extrapolation with receiver-domain wavefield extrapolation. We apply the prestack reverse-time migration, which had been developed at KIGAM, to the seismic field data set of Block 5 in Jeju basin of Korea continental shelf in order to improve subsurface syncline stratigraphy image of the deep structures under the shot point 8km at the surface. We performed basic data processing for improving S/N ratio in the shot gathers, and constructed a velocity model from stack velocity which was calculated by the iterative velocity spectrum. The syncline structure of the stack image appears as disconnected interfaces due to the diffractions, but the result of the prestack migration shows that the syncline image is improved as seismic energy is concentrated on the geological interfaces.

• International Journal of Aeronautical and Space Sciences
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• v.16 no.4
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• pp.520-528
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• 2015

The piezoelectric-hydraulic actuator is a hybrid device that consists of a hydraulic pump driven by a piezo-stack coupled to a conventional hydraulic cylinder. The actuator is of compact size, but can produce a moderate energy output. Such hybrid actuators are currently being researched and developed in many industrialized countries due to the requirement for high performance and compact flight systems. In a previous study, we designed and manufactured a unidirectional hybrid actuator. However, the blocking force was not as high as expected. Therefore, in this study, we redesigned the pump chamber and hydraulic cylinder and also improved the system by removing the air bubbles. Two different types of piezo-stacks were used. In order to achieve bidirectional capabilities in the actuator, commercial solenoid valves were used to control the direction of the output cylinder. Experimental testing of the actuator in unidirectional and bidirectional modes was performed to examine performance issues related to driving frequency, bias pressure, reed valve thickness, etc. The results showed that the maximum blocking force was measured as 970.2N when the frequency was 185Hz.

• Journal of the Korean institute of surface engineering
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• v.44 no.5
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• pp.173-178
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• 2011

Separator of stack in polymer electrolyte membrane fuel cell (PEMFC) is high cost and heavy. If we make it low cost and lighter, it will have a great ripple. In this study, low carbon steel is used as base metal of separator because the cost of low carbon steel is very cheaper commercial metal material than stainless steels, which is widely used as separator. Low carbon steel has not a good corrosion resistance. In order to improve the corrosion resistance and electrolytic conductivity, low carbon steel needs to be surface treated. We made Chromium electroplated layer of $5{\mu}m$, $10{\mu}m$ thickness on the surface of low carbon steel and it was nitrided for 2 hours at $1000^{\circ}C$ in a furnace with 100 torr nitrogen gas pressure. Cross-sectional and surface microstructures of surface treated low carbon steel are investigated using SEM. And crystal structures are investigated by XRD. Interfacial contact resistance and corrosion tests were considered to simulate the internal operating conditions of PEMFC stack. The corrosion test was performed in 0.1 N $H_2SO_4$ + 2 ppm $F^-$ solution at $80^{\circ}C$. Throughout this research, we try to know that low carbon steel can be replaced stainless steel in separator of PEMFC.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.174-174
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• 2008

Non-volatile memories using ferroelectric-gate field-effect transistors (Fe-FETs) with a metal/ferroelectric/semiconductor gate stack (MFS-FETs) make non-destructive read operation possible. In addition, they also have features such as high switching speed, non-volatility, radiation tolerance, and high density. However, the interface reaction between ferroelectric materials and Si substrates, i.e. generation of mobile ions and short retention, make it difficult to obtain a good ferroelectric/Si interface in an MFS-FET's gate. To overcome these difficulties, Fe-FETs with a metal/ferroelectric/insulator/semiconductor gate stack (MFIS-FETs) have been proposed, where insulator as a buffer layer is inserted between ferroelectric materials and Si substrates. We prepared $SrBi_2Ta_2O_9$ (SBT) film as a ferroelectric layer and $LaZrO_x$ (LZO) film as a buffer layer on p-type (100) silicon wafer for making the MFIS-FET devices. For definition of source and drain region, phosphosilicate glass (PSG) thin film was used as a doping source of phosphorus (P). Ultimately, the n-channel ferroelectric-gate FET using the SBT/LZO/Si Structure is fabricated. To examine the ferroelectric effect of the fabricated Fe-FETs, drain current ($I_d$) versus gate voltage ($V_g$) characteristics in logarithmic scale was measured. Also, drain current ($I_d$) versus drain voltage ($V_d$) characteristics of the fabricated SBT/LZO/Si MFIS-FETs was measured according to the gate voltage variation.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2007.04a
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• pp.71-72
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• 2007

In this study, we investigated the fabrication of MLR (multi-layer resist) with a very thin diamond-like carbon (DLC) layer. ArF PR/$SiO_2$/DLC MLR structure was investigated and etching characteristics of the DLC layer was patterned using $SiO_2$ hard-mask by varying the process parameters such as different high-frequency/low-frequency combination ($f_{LF}/f_{HF}$), HF/LF power ratio ($P_{HF}/P_{LF}$), $O_2$ flow and $N_2$ flow rate in $O_2/N_2$/Ar plasmas. The results indicated an increased etch rate of DLC for the higher $f_{LF}/f_{HF}$ combination and for the increased low-frequency power ($P_{LF}$). And the etch rate of DLC was decreased with increasing the $N_2$ flow rate in $O_2/N_2$/Ar plasmas. In order to confirm the application of DLC MLR for the etching process of silicon oxide, the stack of ArF PR/BARC/$SiO_2$/DLC/TEOS/Si was investigated.