• Title/Summary/Keyword: Multistage Interconnection Networks

Search Result 45, Processing Time 0.043 seconds

Performance Analysis of Multibuffered Multistage Interconnection Networks using Small Clock Cycle Scheme (작은 클럭 주기를 이용한 복수버퍼를 가지는 다단 상호연결 네트워크의 해석적 성능분석)

  • Mun, Young-Song
    • Journal of Internet Computing and Services
    • /
    • v.6 no.4
    • /
    • pp.141-147
    • /
    • 2005
  • Ding and Bhuyan, however, has shown that the performance of multistage interconnection networks(MIN's) can be significantly improved if the packet movements are confined within each pair of adjacent stages using small clock cycles. In this paper, an effective model for estimating the performance of multibuffered MIN's employing the approach is proposed. the relative effectiveness of the proposed model is identified compared to the traditional design.

  • PDF

A Study on the Performance Modeling of Input-Buffered Multistage Interconnection Networks Under a Nonuniform Traffic Pattern with Small Clock Cycle Schemes (비균일 트래픽 환경하에서 다단상호연결네트웍의 소클럭주기를 사용한 해석적 성능 모델링 및 평가)

  • Mun Youngsong
    • Journal of Internet Computing and Services
    • /
    • v.5 no.4
    • /
    • pp.35-42
    • /
    • 2004
  • In this paper the more accurate models than any other ones so far have been proposed for the performance evaluation of single-buffered banyan-type Multistage Interconnection Networks(MINs)'s under nonuniform traffic condition is obtained. Small clock cycle instead of big clock cycle is used. The accuracy of proposed models are conformed by comparing with the results from simulation.

  • PDF

Performance Study of Packet Switching Multistage Interconnection Networks

  • Kim, Jung-Sun
    • ETRI Journal
    • /
    • v.16 no.3
    • /
    • pp.27-41
    • /
    • 1994
  • This paper provides a performance study of multistage interconnection networks in packet switching environment. In comparison to earlier work, the model is more extensive - it includes several parameters such as multiple-packet messages, variable buffer size, and wait delay at a source. The model is also uniformly applied to several representative networks and thus provides a basis for fair comparison as well as selection of optimal values for parameters. The complexity of the model required use of simulation. However, a partial analytical model is provided to measure the congestion in a network.

  • PDF

Design and Analysis of an Efficient Distributed Routing Algorithm in Multistage Interconnection Networks (다단계 상호 연결망에서의 효율적인 분산 라우팅 알고리듬의 설계 및 분석)

  • 손유익;안광선
    • Journal of the Korean Institute of Telematics and Electronics
    • /
    • v.26 no.11
    • /
    • pp.1794-1803
    • /
    • 1989
  • This paper presents and evaluates a distributed routing algorithm for effective routing control in circuit-switched multistage interconnection networks. The proposed method uses the distributed control based on the incividual-switching element control and it is very effective for allowing any broadcast connection from a source to arbitrary number of destinadtions. The performnace of the proposed method is analyzed and evaluated by computer simulation in terms of the normalized average time delays.

  • PDF

A Virtual Partially Shared Input-Buffered Banyan Switch Based on Multistage Interconnection Networks (MIN(Multistage Interconnection Networks)망을 이용한 가상 입력 버퍼 반얀 스위치 설계)

  • 권영호;김문기;이병호
    • Proceedings of the Korean Information Science Society Conference
    • /
    • 2004.10c
    • /
    • pp.301-303
    • /
    • 2004
  • 현재 ATM 망에서 다양한 형태의 스위치 구조가 제안 되었으며 스위치 구조는 크게blocking 과 nonblocking 스위치로 나눌 수 있다. nonblocking 스위치는 버퍼의 위치에 따라 input queuing, output queuing, shared buffer switch로 나뉘며 그 중에 입력 버퍼형은 하드웨어 구현이 쉬운 장점이 있으나 HOL블로킹으로 인하여 처리 효율이 낮다는 단점이 있다. 본 논문에서는 이러한 입력 버퍼형 ATM 교환기의 문제점을 해결하기 위하여 가상적인 입력버퍼와 MUX를 이용한 입력버퍼형 반얀 스위치 모델을 제안한다.

  • PDF

Design and Analysis of a Class of Fault Tolerant Multistage Interconnection Networks: the Augmented Modified Delta (AMD) Network (AMD 고장감내 다단계 상호 연결망의 설계 및 분석)

  • Kim, Jung-Sun
    • The Transactions of the Korea Information Processing Society
    • /
    • v.4 no.9
    • /
    • pp.2259-2268
    • /
    • 1997
  • Multistage interconnection networks(MINs) provide a high-bandwidth communication between processors and/or memory modules in a cost-effective way. In this paper, we propose a class of multipath MINs, called the Augmented Modified Delta(AMD) network, and analyze its performance and reliability. The salient features of the AMD network include fault-tolerant capability, modular structure, and high performance, which are essential for real-time parallel/distributed processing environments. The class of the AMD network retains well-known characteristics of the Kappa network, but it's design procedure is more systematic. Like Delta networks, all the AMD networks are topologically equivalent with each other.

  • PDF

Analytical Diagnosis of Single Crosstalk-Fault in Optical Multistage Interconnection Networks (광 다단계 상호연결망의 단일 누화고장에 대한 해석적 고장진단 기법)

  • Kim, Young-Jae;Cho, Kwang-Hyun
    • Journal of Institute of Control, Robotics and Systems
    • /
    • v.8 no.3
    • /
    • pp.256-263
    • /
    • 2002
  • Optical Multistage Interconnection Networks(OMINs) comprising photonic switches have been studied extensively as important interconnecting building blocks for communication networks and parallel computing systems. A basic element of photonic switching networks is a 2$\times$2 directional coupler with two inputs and two outputs. This paper is concerned with the diagnosis of cross-talk-faults in OMINs. As the size of today's network becomes very large, the conventional diagnosis methods based on tests and simulation have become inefficient, or even more, impractical. In this paper, we propose a simple and easily implementable algorithm for detection and isolation of the single crosstalk-fault in OMINs. Specifically, we develope an algorithm fur the isolation of the source fault in switching elements whenever the single crosstalk-fault is detected in OMINS. The proposed algorithm is illustrated by an example of 16$\times$16 banyan network.

Modeling of Input Buffered Multistage Interconnection Networks using Small Clock Cycle Scheme (작은 클럭 주기를 이용한 다단 상호연결 네트워크의 성능분석)

  • Mun Youngsong
    • Journal of Internet Computing and Services
    • /
    • v.5 no.3
    • /
    • pp.35-43
    • /
    • 2004
  • In packet switching using multistage interconnection networks (MIN's), it is generally assumed that the packet movements successively propagate from the last stage to the first stage in one network cycle. However, Ding and Bhuyan has shown that the network performance can be significantly improved if the packet movements are confined within each pair of adjacent stages using small clock cycles. In this paper, an analytical model for evaluating the performance of input-buffered MlN's employing this network cycle approach is proposed, The effectiveness of the proposed model is confirmed by comparing results from the simulation as well as from Ding and Bhuyan model.

  • PDF

Performance Evaluation of Multibuffered Multistage Interconnection Networks under Nonuniform Traffic Pattern (복수버퍼를 가진 다단상호연결네트웍의 비균일 트래픽 환경하에서의 해석적 모델링)

  • Mun Yongsong
    • Journal of Internet Computing and Services
    • /
    • v.5 no.1
    • /
    • pp.41-49
    • /
    • 2004
  • Analytical performance evaluation is crucial for justifying the merit of the design of Multistage Interconnection Networks(MINs) in different operational conditions. While several analytical models have been proposed for the performance evaluation of MlNs, they are mainly for uniform traffics. Even the models for nonuniform traffics have various shortcomings. In this paper, an accurate model for the performance evaluation of multi buffered banyan-type MIN's under nonuniform traffic condition is obtained. The accuracy of proposed models are conformed by comparing with the results from simulation.

  • PDF

Performance Evaluation of Multistage Interconnection Networks under Nonuniform Traffic Pattern (비균일 트래픽 환경하에서 다단상호연결네트웍의 해석적 성능 모델링 및 평가)

  • Mun Young-song
    • Journal of Internet Computing and Services
    • /
    • v.4 no.5
    • /
    • pp.43-49
    • /
    • 2003
  • Analytical performance evaluation is crucial for justifying the merit of the design in different operational conditions. While several analytical models have been proposed for the performance evaluation of Multistage Interconnection Networks(MINs), they are mainly for uniform traffics. Even models for nonuniform traffics have several shortcomings such as they only consider output buffered structure or do not consider blocking conditions. In this paper the mere accurate models than any other ones so far have been proposed for the performance evaluation of banyan-type MIN's under nonuniform traffic condition is obtained. The accuracy of proposed model is conformed by comparing with the results from simulation.

  • PDF