Design of a High Performance 32$\times$ 32-bit Multiplier Based on Novel Compound Mode Logic and Sign Select Booth Encoder
(새로운 복합모드로직과 사인선택 Booth 인코더를 이용한 고성능 32$\times$ 32-bit 곱셈기의 설계)
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- Journal of the Institute of Electronics Engineers of Korea SD
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- v.38 no.3
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- pp.205-210
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- 2001