• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2008.06a
• /
• pp.189-190
• /
• 2008

The electrical characteristics of band-gap engineered tunneling barriers consisting of thin $SiO_2$ and $Si_3N_4$ dielectric layers were investigated. The band structure of stacked tunneling barriers was studied and the effectiveness of these tunneling barriers was compared with that of the conventional tunneling barrier. The band-gap engineered tunneling barriers show the lower operation voltage, faster speed and longer retention time than the conventional $SiO_2$ tunnel barrier. The thickness of each $SiO_2$ and $Si_3N_4$ layer was optimized to improve the performance of non-volatile memory.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.11 no.1
• /
• pp.33-40
• /
• 1998

The composite SiO$_2$/Si$_3$N$_4$/SiO$_2$(ONO) film formed by oxidation on nitride film has been widely studied as DRAM stacked capacitor multi-dielectric films. Load lock(L/L) LPCVD system by HF cleaning is used to improve electrical capacitance and to scale down of effective thickness for memory device, but is brings a new problem. Nitride film deposited using HF cleaning shows selective deposition on poly silicon and oxide regions of capacitor. This problem is avoidable by carpeting chemical oxide using $H_2O$$_2$cleaning before nitride deposition. In this paper, we study the limit of nitride thickness for abnormal oxidation and the initial deposition time for nitride deposition dependent on underlayer materials. We proposed an advanced fabrication process for stacked capacitor in order to avoid selective deposition problem and show the usefulness of nitride deposition using L/L LPCVD system by $H_2O$$_2$cleaning. The natural oxide thickness on polysilicon monitor after HF and $H_2O$$_2$cleaning are measured 3~4$\AA$, respectively. Two substrate materials have the different initial nitride deposition times. The initial deposition time for polysilicon is nearly zero, but initial deposition time for oxide is about 60seconds. However the deposition rate is constant after initial deposition time. The limit of nitride thickness for abnormal oxidation under the HF and $H_2O$$_2$cleaning method are 60$\AA$, 48$\AA$, respectively. The results obtained in this study are useful for developing ultra thin nitride fabrication of ONO scaling and for avoiding abnormal oxidation in stacked capacitor application.

• Journal of IKEEE
• /
• v.28 no.2
• /
• pp.234-238
• /
• 2024

This paper presents a study on the integration of 3D-stacked dual-tip RRAM with a CNN accelerator architecture, leveraging its low drive current characteristics and scalability in a 3D stacked configuration. The dual-tip structure is utilized in a parallel connection format in a synaptic array to implement multi-level capabilities. It is configured within a Network-on-chip style accelerator along with various hardware blocks such as DAC, ADC, buffers, registers, and shift & add circuits, and simulations were performed for the CNN accelerator. The quantization of synaptic weights and activation functions was assumed to be 16-bit. Simulation results of CNN operations through a parallel pipeline for this accelerator architecture achieved an operational efficiency of approximately 370 GOPs/W, with accuracy degradation due to quantization kept within 3%.

• Journal of the Korean Society of Industry Convergence
• /
• v.22 no.5
• /
• pp.519-527
• /
• 2019

This study was conducted to present useful information on the utilization and productivity analysis of laminated modular multi-family housing. To this end, the process of site installation was investigated and analyzed through a prior study, and the monitoring survey was conducted through the site installation case of an stacked multi-family housing. Based on the above, the results of productivity analysis using the web-cyclone technique were also presented. However, the site installation process has limitations on generalisation because the process is not the same for each construction company, and also limits that require verification through application in the actual site of the web-cyclone model presented in this study.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.18 no.3 s.118
• /
• pp.323-333
• /
• 2007

In this paper, a new MDAS-DR antenna structure designed to efficiently shape a flat-topped radiation pattern is proposed. The antenna structure is composed of a stacked micro-strip patch exciter and a multi-layered disk array structure(MDAS) surrounded by a dielectric ring. The MDAS, which was supplied by a stacked microstrip patch exciter with radiating power, can form a flat-topped radiation pattern in a far field by a mutual interaction with the surrounding dielectric ring. Therefore, the design parameters of the dielectric ring and the MDAS structure are important design parameters for shaping a flat-topped radiation pattern. The proposed antenna used twelve multi-layered disk array elements and a Teflon material with a dielectric constant of 2.05. An antenna operated at 10 GHz$(9.6\sim10.4\;GHz)$ was designed in order to verify the effectiveness of the proposed antenna structure. The commercial simulator of CST Microwave $Studio^{TM}$, which was adapted to a 3-D antenna structure analysis, was used for the simulation. The antenna breadboard was also fabricated and its electrical performance was measured in an anechoic antenna chamber. The measured results of the antenna breadboard with a flat-topped radiation pattern were found to be in good agreement with the simulated one. The MDAS-DR antenna gain measured at 10 GHz was 11.18 dBi, and the MDAS-DR antenna was capable of shaping a good flat-topped radiation pattern with a beam-width of about $40^{\circ}$, at least within a fractional bandwidth of 8.0 %.

• Journal of the Korean Vacuum Society
• /
• v.19 no.3
• /
• pp.217-223
• /
• 2010

We grew multi-stacked InAs/$In_{0.1}Ga_{0.9}As$ DWELL (dot-in-a-well) structure by metal organic chemical vapor deposition and investigated optical properties by photoluminescence and I-V characteristics by dark current measurement. When stacking InAs quantum dots (QDs) with same growth parameter, the size and density of QDs were changed, resulting in the bimodal emission peak. By decreasing the flow rate of TMIn, we achieved the uniform multi-stacked QD structure which had the single emission peak and high PL intensity. As the growth temperature of n-type GaAs top contact layer (TCL) is above $600^{\circ}C$, the PL intensity severely decreased and dark current level increased. At bias of 0.5 V, the activation energy for temperature dependence of dark current decreased from 106 meV to 48 meV with increasing the growth temperature of n-type GaAs TCL from 580 to $650^{\circ}C$. This suggest that the thermal escape of bounded electrons and non-radiative transition become dominant due to the thermal inter-diffusion at the interface between InAs QDs and $In_{0.1}Ga_{0.9}As$ well layer.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.28 no.1
• /
• pp.7-11
• /
• 2015

In this study, $Si_3N_4$/SnZnO/AZO/Ag/Ti/ITO multi-layer film were prepared on glass substrate by DC/RF magnetron sputtering method. To prevent interfacial reaction between Ag and ITO layer, Ti buffer layer was inserted. Optical properties and sheet resistance were studied depending on laminating times of each multi-layered film especially in visible ray. The simulation program, EMP (essential macleod program), was adopted and compared with experimental data to expect the experimental result. It was found out that the transmittance of the first stacked $Si_3N_4$/SnZnO/AZO/Ag/Ti/ITO multi-layer film was more than 90%. However, with increasing stacking times, the optical properties of $Si_3N_4$/SnZnO/AZO/Ag/Ti/ITO multi-layer film get worse. Consequently, Ti layer is good for oxidation barrier, but too many uses of this layer may have an adverse effect to optical properties of TCO film.

• Korean Journal of Remote Sensing
• /
• v.37 no.4
• /
• pp.719-731
• /
• 2021

This study proposes a two-stage hybrid classification model for crop classification using multi-temporal remote sensing images; the model combines feature embedding by using an autoencoder (AE) with a convolutional neural network (CNN) classifier to fully utilize features including informative temporal and spatial signatures. Long short-term memory (LSTM)-based AE (LAE) is fine-tuned using class label information to extract latent features that contain less noise and useful temporal signatures. The CNN classifier is then applied to effectively account for the spatial characteristics of the extracted latent features. A crop classification experiment with multi-temporal unmanned aerial vehicle images is conducted to illustrate the potential application of the proposed hybrid model. The classification performance of the proposed model is compared with various combinations of conventional deep learning models (CNN, LSTM, and convolutional LSTM) and different inputs (original multi-temporal images and features from stacked AE). From the crop classification experiment, the best classification accuracy was achieved by the proposed model that utilized the latent features by fine-tuned LAE as input for the CNN classifier. The latent features that contain useful temporal signatures and are less noisy could increase the class separability between crops with similar spectral signatures, thereby leading to superior classification accuracy. The experimental results demonstrate the importance of effective feature extraction and the potential of the proposed classification model for crop classification using multi-temporal remote sensing images.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2009.08a
• /
• pp.207-207
• /
• 2009

• Proceedings of the Korean Institute of Communication Sciences Conference
• /
• 2004.07a
• /
• pp.85-85
• /
• 2004