• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.11
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• pp.2015-2021
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• 2008

Recently, with the growth of photovoltaic system, many researchers and companies have concerned about the multi-level inverter which has an efficiency of boosting voltage. In this paper a novel structure of multi-level converter for reducing ripple of output voltage is proposed. In the proposed converter Buck converters are connected in series to generate the output voltage and the ripple of output voltage can be reduced compared with the exiting Buck converter. Especially when outputting lower output voltage the number of acting switching elements is less and the result of ripple reducing is more obvious. This paper implements a multi-level switching function based on the FPGA.

• Journal of Electrical Engineering and Technology
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• v.10 no.4
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• pp.1552-1557
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• 2015

The paper unleashes a new idea to arrive at reduced switch count topological structures configured in the form of a matrix for a cascaded Multi level inverter (CMLI). The theory encircles to minimize the number of switches involved in the conduction path and there from acclaim reduced input current distortion, lower switching losses and electromagnetic interference. The focus extends to standardize the number of power devices required for reaching different levels of output voltage from the same architecture. It includes appropriate pulse width modulation (PWM) strategy to generate firing pulses and ensure the desired operation of the power modules. The investigative study carries with it MATLAB based simulation and experimental results obtained using suitable prototypes to illustrate the viability of the proposed concept. The promising nature of the performance projects a new dimension in the use of single phase MLIs for renewable energy related applications.

• The Transactions of the Korean Institute of Power Electronics
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• v.5 no.5
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• pp.443-450
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• 2000

A PWM inverter for an induction motor often has a problem with a high frequency leakage current that flows through stray capacitors between stator windings and a motor frame to ground. This paper proposes a new type of Active Common Mode Voltage Canceler circuit for the reduction of common mode voltage and high frequency leakage current generated by the PWM VSI-fed induction motor drives. The compensating voltage applied by the common made voltage canceler has the same amplitude as, hut the opposite polarity to, the common mode voltage by PWM Inverter. Therefore, common mode voltage and high frequency leakage current can be canceled. The proposed circuit consists of four-level half-bridge inverter and common-mode transformer. Simulated and experimental results show that common mode voltage canceler makes significant contributions to reducing a high frequency leakage current.

• Journal of Power Electronics
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• v.18 no.1
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• pp.116-128
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• 2018

Conventionally, in order to reduce the ac components of the dc-link capacitors of the two-level Half-Bridge Voltage Source Inverter (HB-VSI), high dc-link capacitances are required. This necessitates the employment of short-lifetime and bulky electrolytic capacitors. In this paper, an analysis for the performance of low dc-link capacitances-based HB-VSI is presented to elucidate its ability to generate an enhanced fundamental output voltage magnitude without increasing the voltage rating of the involved switches. This feature is constrained by the load displacement factor. The introduced enhancement is due to the ac components of the capacitors' voltages. The presented approach can be employed for multi-phase systems through using multi single-phase HB-VSI(s). Mathematical analysis of the proposed approach is presented in this paper. To ensure a successful operation of the proposed approach, a closed loop current controller is examined. An expression for the critical dc-link capacitance, which is the lowest dc-link capacitance that can be employed for unipolar capacitors' voltages, is derived. Finally, simulation and experimental results are presented to validate the proposed claims.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.23 no.12
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• pp.136-145
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• 2009

This paper proposes control methods and simulation models of a driving system, which consists of converters and inverters, for high speed trains employing multi-level power converters. The control method of a single phase three-level converter for high-speed trains is designed to use DC values instead of instantaneous current values which are usually used in single-phase application, so that it results in a fast and robust voltage control response. In addition, simulation models of Space Vector Pulse Width Modulation (SVPWM) for single phase three-level converters as well as three level inverters are proposed. Experimental results demonstrate the validity of the simulation model for three-level inverters.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.53 no.3
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• pp.116-121
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• 2004

This paper proposes a novel UPFC based on 3-level Half-bridge modules, isolated through single-phase multi-winding transformers. The dynamic performance of proposed system was analyzed by simulation with EMTDC, assuming that the UPFC is connected with the 138-kV transmission line of one-machine-infinite-bus power system. The proposed system can be directly connected to the transmission line without series injection transformers. It has flexibility in expanding the operation voltage by increasing the number of 3-level Half-bridge modules.

• Journal of Power Electronics
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• v.14 no.2
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• pp.271-281
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• 2014

Fluctuating wind conditions necessitate the use of a variable speed wind turbine (VSWT) with a AC/DC/AC converter scheme in order to harvest the maximum power from the wind and to decouple the synchronous generator voltage and frequency from the grid voltage and frequency. In this paper, a combination of a three phase diode bridge rectifier (DBR) and a modified topology of the diode clamped multilevel inverter (DCMLI) has been considered as an AC/DC/AC converter. A control strategy has been proposed for the DCMLI to achieve the objective of grid interface of a wind power system together with local load compensation. A novel fixed frequency current control method is proposed for the DCMLI based on the level shifted multi carrier PWM for achieving the required control objectives with equal and uniform switching frequency operation for better control and thermal management with the modified DCMLI. The condition of the controller gain is derived to ensure the operation of the DCMLI at the fixed frequency of the carrier. The converter current injected into the distribution grid is controlled in accordance with the wind power availability. In addition, load compensation is performed as an added facility in order to free the source currents being fed from the grid of harmonic distortion, unbalance and a low power factor even though the load may be unbalanced, non-linear and of a poor power factor. The results are validated using PSCAD/EMTDC simulation studies.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.21 no.1
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• pp.131-141
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• 2007

This paper proposes analysis on new equipment for power quality in electric railway. The proposed equipment consists of series inverter and parallel inverter. Each inverter is connected by capacitor as dc link. This structure can be compensated for active and reactive power in catenary through transformer. We verified the proposed equipment using the PSCAD/EMTDC and the calculation results from the proposed approach are widely described in the paper.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.55 no.5
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• pp.265-270
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• 2006

In this paper EMI problems with induction motor drive system using multi-level inverters are investigated. The high power multi-level inverter usually operates with low switching frequency and produces large noises. Generally, EMI consists of the conduction component through source lines and emission component emitted to the space. This conduction component can be classified to the common-mode between source line and ground, and the normal-mode between lines. The EMI filters for the induction motor drive system are designed and implemented to reduce EMI noise. Finally the designed system is verified by the experiment. The experimental results show that both the normal mode and common mode noises are greatly reduced compared to the system without filters.

• Journal of Power Electronics
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• v.18 no.3
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• pp.863-870
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• 2018

The traditional power control theories for the harmonic reduction methods in multilevel inverters are found to be unreliable under unbalanced load conditions. The unreliability in harmonic mitigation is caused by voltage fluctuations, non-linear loads, the use of power switches, etc. In general, the harmonics are reduced by filters. However, such devices are an expensive way to provide a smooth and fast response to secure power systems during dynamic conditions. Hence, the Decoupled Double Synchronous Reference Frame (DDSRF) theory combined with a State Delay Controller (SDC) is proposed to achieve a harmonic reduction in power systems. The DDSRF produces a sinusoidal harmonic that is the opposite of the load harmonic. Then, it injects this harmonic into power systems, which reduces the effect of harmonics. The SDC is used to reduce the delay between the compensation time for power injection and the generation of a reference signal. The proposed technique has been simulated using MATLAB and its reliability has been verified experimentally under unbalanced conditions.