• Journal of Power Electronics
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• 제15권5호
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• pp.1318-1328
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• 2015

The photovoltaic (PV) power conditioning system for small-scale applications has gained significant interest in the past few decades. However, the standalone mode of operation has been rarely approached. This paper presents a two-stage multi-level micro-inverter topology that considers the different operation modes. A multi-output flyback converter provides both the DC-Link voltage balancing for the multi-level inverter side and maximum power point tracking control in grid connection mode in the PV stage. A modified H-bridge multi-level inverter topology is included for the AC output stage. The multi-level inverter lowers the total harmonic distortion and overall ratings of the power semiconductor switches. The proposed micro-inverter topology can help to decrease the size and cost of the PV system. Transient analysis and controller design of this micro-inverter have been proposed for stand-alone and grid-connected modes. Finally, the system performance was verified using a 120 W hardware prototype.

• 전력전자학회논문지
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• 제17권4호
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• pp.291-297
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• 2012

Recently, Switching devices become cheaper, depending on the multi-level inverters are considered as the power-conversion systems for high-power and power-quality demanding applications. The multi-level inverters can reduce the THD(Total Harmonic Distortion) as the output which is similar sinusoidal waveform by synthesizing several capacitor DC voltages. However it has some disadvantages such as increased number of components, complex PWM control method. Therefore, this paper is proposed the new multi-level inverter topology using an new H-bridge output stage with a bidirectional auxiliary switch. The proposed topology is the 4-level 3-phase PWM inverter with less switching part than conventional multi-level inverters and reactive power control possible. In order to understand the new multi-level inverter, topology analysis and switching patterns and modes according to the current loop are described in this paper. The proposed multi-level inverter topology is validated through PSIM simulation and the experimental results are provided from a prototype.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• 제11B권3호
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• pp.112-118
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• 2001

In the near future, the voltage of power system for passenger vehicle will be changed to 42V from existing 14V./ Because of increasing power and voltage ratings used in the vehicle the motor drive system has high switching dv/dt and it generates electromagnetic interference (EMI) To solve these problems multi-level inverter system may be used The feature of multi-level inverter is the output voltage to be synthesized from several levels of voltage Because of this feature high switching dv/dt and EMI can be reduced in the multi-level inverter system But as the number of level is increased manufacturing cost is getting expensive and system size is getting large. Because of these disadvantages the application of multi-level inverter has been restricted only to high power drives. The method to reduce manufacturing cost and system size is to integrate circuit of multi-level inverter into a few chips But isolated power supply and signal isolation circuit using transformer or opto-coupler for drive circuit are obstacles to implement the integrated circuit (IC) In this paper a drive circuit of 4-level inverter suitable for integration to hybrid or one chip is proposed In the proposed drive circuit DC link voltage is used directly as the power source of each gate drive circuit NPN transistors and PNP transistors are used to isolate to transfer the control signals. So the proposed drive circuit needs no transformers and opto-couplers for electrical isolation of drive circuit and is constructed only using components to be implemented on a silicon wafer With th e proposed drive circuit 4- level inverter system will be possible to be implemented through integrated circuit technology Using the proposed drive circuit 4- level inverter system is constructed and the validity and characteristics of the proposed drive circuit are proved through the experiments.

• 전력전자학회논문지
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• 제20권4호
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• pp.337-343
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• 2015

The multi-level inverters are highly efficient for high-power and medium-voltage AC driving applications, such as high-speed railway systems and renewable energy resources, because such inverters generate lower total harmonic distortion (THD) and electromagnetic interface (EMI). Lower switching stress occurs on switching devices compared with conventional two-level inverters. Depending on the multi-level inverter topology, the required components and number of switching devices are different, influencing the overall efficiency. Comparative studies of multi-level inverters based on loss analysis and output characteristic are necessary to apply multi-level inverters in high-power AC conversion systems. This paper proposes a theoretical loss analysis method based on piecewise linearization of characteristic curves of power semiconductor devices as well as loss analysis and output performance comparison of five-level neutral-point clamped, flying capacitor inverters, and high-level cascaded H-bridge multi-level inverters.

• Journal of Electrical Engineering and information Science
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• 제1권2호
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• pp.109-118
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• 1996

This paper deals with a new multi-level high voltage source inverter with GTO Thyristors. Recently, a multi-level approach seems to be the best suited for implementing high voltage conversion systems because it leads to harmonic reduction and deals with safe high power conversion systems independent of the dynamic switching characteristics of each power semiconductor device. A conventional multi-level inverter has some problems; voltage unbalance between DC-link capacitors and larger blocking voltage across the inner switching devices. To solve these problems, the novel multi-level inverter structure is proposed.

• 반도체디스플레이기술학회지
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• 제13권4호
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• pp.43-48
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• 2014

Two-level inverter has some disadvantages like high harmonics contained in the output current, efficiency limit and stress to switching device as IGBT and FET. Many researches have reported multi-level inverter to complement two-level inverter of problems. In this paper, we suggest MPPT algorithm of multi-string three-level solar inverter that considered nowadays. We added midpoint controller in order to implement the MPPT algorithm because the three-level inverter has to need midpoint controller and procured the stability of direct current link. We verify the superiority of multi-string T-Type inverter and the algorithm we suggested with solar irradiance variation experiment and MPPT efficiency measurement. The MPPT efficiency was confirmed with a high efficiency more than 99.97%.

• 전기학회논문지
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• 제58권12호
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• pp.2359-2369
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• 2009

The study on the multi-level inverter has been increasingly progressing to reduce the switching loss and improve the THD of output current in photovoltaic inverter. Recently, the main topics of multi-level inverter are to reduce the number of devices maintaining the power quality. Therefore, the novel topology was proposed for these problem which is composed of the isolated H-bridge multi-level inverter using the three phase low frequency transformer. The proposed multi-level inverter may not be need for a independent DC power, diode and capacitor. Specially, It has a advantage in generating high voltage source. The proposed approach is verified through simulation and experiment.

• Journal of Power Electronics
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• 제9권4호
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• pp.593-603
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• 2009

This paper proposes and describes the design and operational principles of a three-phase three-level nine switch voltage source inverter. The proposed topology consists of three bi-directional switches inserted between the source and the full-bridge power switches of the classical three-phase inverter. As a result, a three-level output voltage waveform and a significant suppression of load harmonics contents are obtained at the inverter output. The harmonics content of the proposed multilevel inverter can be reduced by half compared with two-level inverters. A Fourier analysis of the output waveform is performed and the design is optimized to obtain the minimum total harmonic distortion. The full-bridge power switches of the classical three-phase inverter operate at the line frequency of 50Hz, while the auxiliary circuit switches operate at twice the line frequency. To validate the proposed topology, both simulation and analysis have been performed. In addition, a prototype has been designed, implemented and tested. Selected simulation and experimental results have been provided.

• 전력전자학회논문지
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• 제7권2호
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• pp.111-120
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• 2002

멀티레벨 인버터 시스템은 낮은 고조파 성분과 높은 전력이 요구되는 분야에 매우 효율적인 시스템이다. 멀티레벨 인버터 시스템의 경우에 스위치 소자의 손실은 기존의 방법으로는 해석 할 수 없다. 그 이유는 각 스위치 소자의 손실이 2-레벨과는 다르게 서로 같지 않기 때문이다. 본 논문에서는 멀티레벨 인버터 시스템에 대한 전도 손실과 스위칭 손실의 간단하고 정확한 방법을 제안하였다. 제안된 방법의 타당함은 3-레벨과 4-레벨 다이오드 클램프드 인버터 시스템에 대해 증명하였다.

• 전력전자학회논문지
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• 제16권3호
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• pp.283-292
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• 2011

본 논문에서는 기존의 멀티레벨 인버터와는 달리 DC링크단에 스위치를 설치함으로써 성능을 향상시킨 새로운 형태의 H-브리지 멀티레벨 인버터를 제안한다. 제안된 방식은 계통 연계형 단상 멀티레벨 인버터로서 기존의 단상인버터에 비하여 출력 전압 파형이 정현파에 가깝고, 고압 대용량 시스템용 멀티레벨 인버터로의 확장도 용이할 뿐만 아니라 직렬연결을 통하여 간단히 전압레벨을 확장할 수 있다는 장점을 갖는다. 동일한 5레벨의 경우 기존의 H-브리지 직렬형이나 NPC형 멀티레벨 인버터는 가제어 스위치가 8개 사용되는 반면에 제안한 멀티레벨 인버터는 가제어 스위치가 6개 사용되기 때문에 회로 구성이 간단하여 신뢰도가 높고 경제적인 구현이 가능하고 스위칭 손실이 줄어서 효율이 향상되는 특징이 있다. POD 변조기법을 기반으로 하여 반송파 신호 하나만을 사용하는 새로운 PWM 방법을 제시하였으며 DC링크 커패시터 전압의 균형을 위한 스위칭 시퀀스에 대해서도 검토하였다. 제안된 토폴로지의 타당성을 시뮬레이션과 실험을 통하여 확인하였다.