• Title/Summary/Keyword: Multi-level inverter

Search Result 188, Processing Time 0.025 seconds

Self-Oscillating Switching Technique for Current Source Parallel Resonant Induction Heating Systems

  • Namadmalan, Alireza;Moghani, Javad Shokrollahi
    • Journal of Power Electronics
    • /
    • v.12 no.6
    • /
    • pp.851-858
    • /
    • 2012
  • This paper presents resonant inverter tuning for current source parallel resonant induction heating systems based on a new self oscillating switching technique. The phase error is suppressed in a wide range of operating frequencies in comparison with Phase Locked Loop (PLL) techniques. The proposed switching method has the capability of tuning under fast changes in the resonant frequency. According to this switching method, a multi-frequency induction heating (IH) system is proposed by using a single inverter. In comparison with multi-level inverter based IH systems, the advantages of this technique are its simple structure, better transients and wide range of operating frequencies. A laboratory prototype was built with an operating frequency of 35 kHz to 55 kHz and 300 W of output power. The performance of the IH system shows the validity of the new switching technique.

Performances of SRM for LSEV

  • Ahn Jin-Woo;Kim Tae-Hyoung;Lee Dong-Hee
    • Journal of Power Electronics
    • /
    • v.5 no.1
    • /
    • pp.45-54
    • /
    • 2005
  • This paper presents an application of SR drives for LSEV's(Low Speed Electric Vehicles) which are used for golf and leisure. Two types of 5[HP] SRM's and its drive system are designed and tested. In order to be energy saving and have effective braking during deceleration, a multi-level inverter is proposed. For the precise switching angle control, a new type of analog encoder is proposed. A current control is adopted for soft starting and an angle control is adopted at high speed to increase efficiency. Drive characteristics and performance are shown with test results.

A New Symmetric Multilevel Inverter Topology Using Single and Double Source Sub-Multilevel Inverters

  • Ramani, Kannan;Sathik, Mohd. Ali Jagabar;Sivakumar, Selvam
    • Journal of Power Electronics
    • /
    • v.15 no.1
    • /
    • pp.96-105
    • /
    • 2015
  • In recent years, the multilevel converters have been given more attention due to their modularity, reliability, failure management and multi stepped output waveform with less total harmonic distortion. This paper presents a novel symmetric multilevel inverter topology with reduced switching components to generate a high quality stepped sinusoidal voltage waveform. The series and parallel combinations of switches in the proposed topology reduce the total number of conducting switches in each level of output voltages. In addition, a comparison between the proposed topology with another topology from the literature is presented. To verify the proposed topology, the computer based simulation model is developed using MATLAB/Simulink and experimentally with a prototype model results are then compared.

Vector Control Method For Common-Arm multi-level Inverter (벡터제어방식에 의한 공통암 멀티레벨 인버터)

  • Song, Doo-Young;Song, Sung-Geun;Kim, Dong-Ok;Park, Sung-Jun;Kim, Kwang-Heon;Lim, Young-Cheol
    • Proceedings of the KIPE Conference
    • /
    • 2007.07a
    • /
    • pp.153-155
    • /
    • 2007
  • 본 논문에서는 3상 저주파 변압기를 이용한 절연형 멀티레벨 인버터를 위한 새로운 공간 벡터 제어 방식을 제안한다. 제안된 제어 방식은 기존의 미리 계산된 표를 이용한 방식이 아닌 완전히 프로그래밍에 의한 방식으로 구현 시간은 기존 방식에 비해 늘이지 않으며, 확장성이 용의하다는 장점이 있다. 제안된 제어 방식을 공통암을 이용한 3상 IHCML 인버터에 적용하였으며, Matlab을 이용한 시뮬레이션 및 실험실 차원의 인버터 제작을 통하여 제안한 방식의 타당성을 검증 하였다.

  • PDF

Carrier based SVPWM Method for Multi-Level System Considering Harmonic Distortion Factor

  • Lee, Yo-Han;Kim, Dong-Hyun;Hyun, Dong-Seok
    • Journal of Power Electronics
    • /
    • v.1 no.1
    • /
    • pp.26-35
    • /
    • 2001
  • In most inverter/converter applications SVPWM method is a preferred approach since it shows good characteristics in linear modulation range and waveform quality. In this paper, we propose a new carrier based SVPWM method for multi-level system, First, we survey the conventional carrier based SVPWM method, and investigate the problem of the conventional one for the multi-level system with the focus on the switching frequency harmonic flux trajectories. Finally, we propose a new carrier based SVPWM method that can reduce harmonic distortion. Simulation and experimental results are given for verification of the proposed SVPWM method.

  • PDF

Output Voltage Harmonics Analysis of NPC Type Three-level Inverter (NPC형 3레벨 인버터의 출력전압 고조파 분석)

  • Kwon, Kyoung-Min;Choi, Jae-Ho;Chung, Gyo-Bum
    • The Transactions of the Korean Institute of Power Electronics
    • /
    • v.14 no.6
    • /
    • pp.472-480
    • /
    • 2009
  • This paper describes the overmodulative SVPWM technique and harmonics analyses of three phase NPC type three-level inverter to the modulation index. Three phase NPC type three-level inverter adopted SVPWM to extend the linear region to 0.907, moreover, the following voltage compensation using Fourier series was adopted in the region of overmodulation to make it work to six-step level. PD type of multi carrier method is used with the double Fourier series for the analysis of output power harmonics characteristic. Simulation was performed by PSIM, and the harmonics characteristics of 3-level inverter in each region are analyzed. The side band harmonics of carrier frequency are dominant in the linear region, but these harmonic components are decreased as the inveter goes to overmodulation region, and the harmonics due to the fundamental frequency is increased gradually at the same time. The harmonic analyses are verified through the simulation and experimental results under the same condition.

The study On the single phase multi-level inverter (단상 Multi-level 인버터용 전력회로에 관한 연구)

  • Park, Sung-Jun;Choo, Young-Bae;Gwon, Sun-Jae;Kim, Cheul-U;Lee, Man-Hyung
    • Proceedings of the KIEE Conference
    • /
    • 1998.07f
    • /
    • pp.1957-1959
    • /
    • 1998
  • 본 연구에서는 단상 인버터에서 출력 고조파 성분을 억제하기 위해 3레벨 PWM 인버터의 전력회로를 제안하였다. 이 제안된 전력회로를 이용하여 정현적 PWM전압을 발생하기 위한 스위칭함수를 구현하였다. 또한 부하변동에 따른 동특성을 개선시키고, 인덕터의 편자현상을 보상하기 위해 인덕터의 전류제어기를 구성하였다.

  • PDF

The High Power Active Filter System for Harmonic Compensation of 25kv Electric Railway (25kV 전기철도 고조파 보상을 위한 고전력 능동전력필터 시스템에 관한 연구)

  • Kim, Jae-Chul;Rho, Sung-Chan;Lee, Yoo-Kyung
    • Journal of the Korean Society for Railway
    • /
    • v.9 no.6 s.37
    • /
    • pp.761-765
    • /
    • 2006
  • At present, harmonic currents cause serious problems in power conversion system using the semiconductor switching device. Also some of the conversion system provokes harmonic currents against to the main power supply system and causes hindrances for the system. Main power impedance of the traditional LC passive filter method, influences on the filter characteristics and amplifies the harmonics when resonance phenomenon is occurred. And the traditional existing 2 level inverter systems show the limit in capacity of voltage and current in case of occurring sudden load change. So, to solve this problem active filter which uses cascaded H-bridge multi level inverter has been designed and ex-filter system circuits were totally investigated. With multi level active filtering system not only the size of filter but also the size of filter for transformer can be reduced by half and so as to the weight, while the capacity of inverter can be double sized and wave forms can be compensated exactly and precisely. Also by the benefit of the increase in rating capacity, the various currents owing to the load fluctuation can be dealt more steadily. In order to simulate the wave form of harmonics based on the measured data on the AC 25kV high speed Domestic Commercial railway, it was simulated with PSCAD/EMTDC and PSIM. Based on the results of this demonstration, the power supply system and inverter system would be more stable and also promoting its efficiency.

Partial O-state Clamping PWM Method for Three-Level NPC Inverter with a SiC Clamp Diode

  • Ku, Nam-Joon;Kim, Rae-Young;Hyun, Dong-Seok
    • Journal of Electrical Engineering and Technology
    • /
    • v.10 no.3
    • /
    • pp.1066-1074
    • /
    • 2015
  • This paper presents the reverse recovery characteristic according to the change of switching states when Si diode and SiC diode are used as clamp diode and proposes a method to minimize the switching loss containing the reverse recovery loss in the neutral-point-clamped inverter at low modulation index. The previous papers introduce many multiple circuits replacing Si diode with SiC diode to reduce the switching loss. In the neutral-point-clamped inverter, the switching loss can be also reduced by replacing device in the clamp diode. However, the switching loss in IGBT is large and the reduced switching loss cannot be still neglected. It is expected that the reverse recovery effect can be infrequent and the switching loss can be considerably reduced by the proposed method. Therefore, it is also possible to operate the inverter at the higher frequency with the better system efficiency and reduce the volume, weight and cost of filters and heatsink. The effectiveness of the proposed method is verified by numerical analysis and experiment results.

A Simple Control Strategy for Balancing the DC-link Voltage of Neutral-Point-Clamped Inverter at Low Modulation Index

  • C.S. Ma;Kim, T.J.;D.W. Kang;D.S. Hyun
    • Journal of Power Electronics
    • /
    • v.3 no.4
    • /
    • pp.205-214
    • /
    • 2003
  • This paper proposes a simple control strategy based on the discontinuous PWM (DPWM) to balance the DC-link voltage of three-level neutral-point-clamped (NPC) inverter at low modulation index. It introduces new DPWM methods in multi-level inverter and one of them is used for balancing the DC-link voltage. The current flowing in the neutral point of the DC-link causes the fluctuation of the DC-link voltage of the NPC inverter. The proposed DPWM method changes the path and duration time of the neutral point current, which makes the overall fluctuation of the DC-link voltage zero during a sampling time of the reference voltage vector. Therefore, by using the proposed strategy, the voltage of the DC-link can be balanced fairly well and the voltage ripple of the DC-link is also reduced significantly. Moreover, comparing with conventional methods which have to perform the complicated calculation, the proposed strategy is very simple. The validity of the proposed DPWM method is verified by the experiment.