• Proceedings of the International Microelectronics And Packaging Society Conference
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• 1999.11a
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• pp.33-36
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• 1999

In this paper, we proposed a simultaneous switching noise(SSN) reduction technique in muti-layer beards(MLB) for high-speed digital applications and analyzed them using the Finite Difference Time Domain(FDTD) method. The new method by conductive dielectric substrates reduces SSN couplings and resonances, significantly, which cause series malfunctions in the modem high-speed digital applications.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.550-552
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• 2003

We prepared $Co_{77}Cr_{20}Ta_3$ Magnetic layer for perpendicular magnetic recording media with introduce Two-step methode and Amorphous Si Underlayer on slide glass substrate. The thickness of magnetic layer were 100nm, and Underlayer were varied from 5 to 100 nm. The multi layer Properties of crystal structure were examined with XRD. Prepared thin films showed improvement of dispersion angle of c-axis orientation ${\Delta}{\theta}_{50}$ caused by inserting Buffer-layer and amorphous Si underlayer.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.9
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• pp.771-774
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• 2003

In this paper, the programming characteristics of the multi-bit devices based on SONOS structure are investigated. Our devices have been fabricated by 0.35 $\mu\textrm{m}$ complementary metal-oxide-semiconductor (CMOS) process with LOCOS isolation. In order to achieve the multi-bit operation per cell, charges must be locally frapped in the nitride layer above the channel near the source-drain junction. Programming method is selected by Channel Hot Electron (CUE) injection which is available for localized trap in nitride film. To demonstrate CHE injection, substrate current (Isub) and one-shot programming curve are investigated. The multi-bit operation which stores two-bit per cell is investigated. Also, Hot Hole(HH) injection for fast erasing is used. The fabricated SONOS devices have ultra-thinner gate dielectrics and then have lower programming voltage, simpler process and better scalability compared to any other multi-bit storage Flash memory. Our programming characteristics are shown to be the most promising for the multi-bit flash memory.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.28 no.11
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• pp.1727-1732
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• 2004

A nickel layer was deposited onto the PZT thin films, serving both as a selective radiation absorption layer and as a top electrode. The absorption properties of such nickel coated multi-layered infrared detectors were studied in the visible and infrared wavelength ranges. The optimal thickness of the nickel layer on our substrate was 10nm. The maximum absorption coefficient of the deposited 10nm thick nickel layer was 0.7 at a 632nm wavelength. However, a striking asymmetric polarization hysteresis loop was observed in these PZT thin films with nickel as the top electrode. This asymmetric polarization was attributed to the difference between the dynamic pyroelectric responses in these Ni/PZT/Pt films poled either positively or negatively before the measurement. A positively poled film showed a 40% higher voltage response than a negatively poled detector.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.3
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• pp.541-546
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• 2010

The push-push DRO(dielectric resonator oscillator) using a multi-layer structure of LTCC(low temperature co-fired ceramic) fabrication is designed. After the single DRO of series feedback type in the center frequency of 8GHz is designed, the push-push DRO in the center frequency of 16GHz including the Wilkinson power combiner is designed. The bias circuit affecting the size of oscillator are embedded in the intermediate layer of the LTCC multi-layer substrate. As a result, the large reduction in the size of VCO is obtained compared to the general oscillator on the single layer substrate. Experimental results show that the fundamental and third harmonics suppression are above 15dBc and 25dBc, respectively, and phase noise characteristics of the push-push DRO presents performance of -102dBc/Hz@100KHz and -128dBc/Hz@1MHz offset frequencies from carrier.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.1
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• pp.44-47
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• 2012

The $TiO_2/Si_3N_4/Ag/Si_3N_4/TiO_2$ multi layered structure was designed for the possible application of transparent electrodes in PDP (Plasma Display Panel). Multi layered film was deposited on a glass substrate at room temperature by DC/RF magnetron sputtering system and EMP (Essential Macleod Program) was adopted to optimize the optical characteristics of film. During the deposition process, the Ag layer in $TiO_2/Ag/TiO_2$ became heavily oxidized and the filter characteristic was degraded easily. In thus study, Si3N4 layer was used as a diffusion buffer layer between $TiO_2$ and Ag. in order to prevent the oxidation of Ag layer in $TiO_2/Si_3N_4/Ag/Si_3N_4/TiO_2$ structure. It was confirmed that $Si_3N_4$ layer is one of candidate materials acting as diffusin barrier between $TiO_2/Ag/TiO_2$.

• Tribology and Lubricants
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• v.18 no.4
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• pp.260-266
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• 2002

In this study, the effects of oxide layer farmed on the wear tracks of TiN coated silicon wafer on friction and wear characteristics were investigated. Silicon wafer was used for the substrate of coated disk specimens, which were prepared by depositing TiN coating with 1 ${\mu}{\textrm}{m}$ in coating thickness. AISI 52100 steel ball was used fur the counterpart. The tests were performed both in air for forming oxide layer on the wear track and in nitrogen to avoid oxidation. This paper reports characterization of the oxide layer effects on friction and wear characteristics using X-ray diffraction(XRD), Auger electron spectroscopy(AES), scanning electron microscopy (SEM) and multi-mode atomic force microscope(AFM).

• Journal of Korea Society of Industrial Information Systems
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• v.19 no.2
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• pp.45-49
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• 2014

In this work, a phase shifter radio-frequency integrated chip (RFIC) using a simple all-pass network is presented. As a tuning element of the phase shifter RFIC, tunable capacitors with a multi-layer dielectric of a para-/ferro-/para-electrics using a high tunable BST ferroelectric and a low-loss BZN paraelectric thin film were utilized. In order to evaluate and analyze the fabricated phase shifter RFIC, the same elements such as an inductor and capacitor integrated into it are also fabricated and tested. The designed phase shifter RFIC was fabricated on a quartz substrate in the size of $1.16{\times}1.21mm^2$. As the test results, the maximum phase difference of $350^{\circ}$ is obtained at 15 V and its tuning frequency bandwidth is 90 MHz from 2.72 to 2.81GHz.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.180-181
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• 2006

As a rule, high temperature superconducting coated conductors have multi-layered buffers consisting of seed, diffusion barrier and cap layers. Multi-buffer layer deposition requires longer fabrication time. This is one of main reasons which increases fabrication cost Thus, single buffer layer deposition seems to be important for practical coated conductor process. In this study, a single layered buffer deposition of $CeO_2$ for low cost coated conductors has been tried using thermal evaporation technique 100nm-thick $CeO_2$ layers deposited by thermal evaporation were found to act as a diffusion layer. $0.4{\mu}m$-thick SmBCO superconducting layers were deposited by thermal co-evaporation on the $CeO_2$ buffered Ni-W substrate. Critical current of 118A/$cm^2$ was obtained for the SmBCO coated conductors.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2003.06a
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• pp.1537-1540
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• 2003

MEMS technology with micro scale is complete system utilized as the sensor. micro electro device. The metallization of MEMS is very important to transfer the power operating the sensor and signal induced from sensor part. But in the MEMS structures local stress concentration and deformation is often happened by geometrical shape and different constraint on the metallization. Therefore. this paper studies the effect of supporting type and thickness ratio about thin film thickness of the substrate thickness for the residual stress variation caused by thermal load in the multi-layer thin film. Specimens were made from materials such as Al, Au and Cu and uniform thermal load was applied, repeatedly. The residual stress was measured by FEA and nano-indentation using AFM. Generally, the specimen made of Al induced the large residual stress and the 1st layer made of Al reduced the residual stress about half percent than 2nd layer. Specimen made of Cu and Au being the lower thermal expansion coefficient induce the minimum residual stress. Similarly the lowest indentation length was measured in the Au_Cu specimen by nano-indentation.