• 한국시뮬레이션학회:학술대회논문집
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• 한국시뮬레이션학회 2002년도 춘계학술대회논문집
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• pp.177-181
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• 2002

In this paper, the design of 12bit pipeline BiCMOS A/D converter presented. A BiCMOS operational amplifier and comparator suitable for use in the pipeline A/D converter. The main features is low distortion track-and-hold with 0-300MHz input bandwidth, and a proprietary 12bit multi-stage quantizer.

• Journal of international Conference on Electrical Machines and Systems
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• 제1권3호
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• pp.354-359
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• 2012

A transformerless converter suitable for multiphase drive application is presented in this paper. The topology employs a cascaded H-bridge rectifier as the interface between the grid and multi inverters which drive the multiphase motor. Compared with the conventional structure, the new topology eliminates the input transformer and also has the advantages such as four quadrant operation, simple configuration, low cost, high efficiency, and so on. The control strategies for the grid-side cascade H-bridge rectifier and the motor-side inverter are studied accordingly. Based on the multi-rotational reference frame, modular control scheme is developed to regulate the multiphase drive system. Simulation results show the proper operation of the proposed topology and the corresponding control strategy.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 하계학술대회 논문집 B
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• pp.1319-1321
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• 2004

This paper presents a model and simulation for the korean type multi-propulsion system consisting of a gas turbine driven synchronous alternator coupled to a rectifier and dc-to-dc converter. The simulation modules include turbine system, alternator and rectifier, dc-to-dc converter, power management module. A modular, system level simulation of the propulsion system prototype is presented in order to confirm stability for loads with uncertain input impedances and uncertain control loop speeds.

• Journal of Power Electronics
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• 제15권2호
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• pp.309-318
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• 2015

This study proposes a dual-output single-stage bridgeless single-ended primary-inductor converter (DOSSBS) that can completely remove the front-end full-bridge alternating current-direct current rectifier to accomplish power factor correction for universal line input. Without the need for bridge diodes, the proposed converter has the advantages of low component count and simple structure, and can thus significantly reduce power loss. DOSSBS has two uncommon output ports to provide different voltage levels to loads, instead of using two separate power factor correctors or multi-stage configurations in a single stage. Therefore, this proposed converter is cost-effective and compact. A magnetically coupled inductor is introduced in DOSSBS to replace two separate inductors to decrease volume and cost. Energy stored in the leakage inductance of the coupled inductor can be completely recycled. In each line cycle, the two active switches in DOSSBS are operated in either high-frequency pulse-width modulation pattern or low-frequency rectifying mode for switching loss reduction. A prototype for dealing with an $85-265V_{rms}$ universal line is designed, analyzed, and built. Practical measurements demonstrate the feasibility and functionality of the proposed converter.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2018년도 전력전자학술대회
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• pp.105-107
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• 2018

This paper presents a new hybrid multilevel converter topology, which consists of a combination of the series connected switched capacitor units with boost ability, and an H-bridge with T-type bidirectional switches. The proposed converter boosts the input voltage without any bulky inductors, and has the small number of components, which can make the size and cost of a power converter greatly reduced. The output filter size and harmonics are also reduced by the high quality multilevel output. In addition, there is no need for complicated methods to balance the capacitor voltage. Simulation and experimental results with a nine-level converter system are presented to validate the proposed topology and modulation method.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 F
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• pp.2054-2056
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• 1998

A conventional UPS can supply the clean power to the load. However, it may generate input current harmonics and the input power factor can be very poor. Therefore, the UPS itself may be a power interruption. This paper provides multifunctional converter of using single phase UPS. The proposed UPS can supply the clean power to the load without polluting the mains power system. The multi-functional converter provides battery charging, var compensation and harmonic suppression simultaneously. It was simulated to verify this work.

• 한국산업융합학회 논문집
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• 제22권3호
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• pp.365-371
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• 2019

Recently, the demonstration and research on the power transmission using high voltage DC such as HVDC(High Voltage DC), Smart Grid, DC transmission and distribution have been actively conducted. In order to control the power converter in high-voltage DC power transmission system, SMPS(Switching Modulation Power Supply) for power converter control using high-voltage DC input is essential. However, the demand for high-pressure SMPS is still low, so the development is not enough. In the low-output SMPS using the high-voltage input, it is difficult to achieve high efficiency due to the switching transient loss especially at light load. In this paper, we propose a new switching scheme for high power SMPS control for low output power. The proposed method can provide better efficiency increase effect in the light load region compared to the existing PWM method. To verify the feasibility of the proposed method, a 40 W SMPS for HVDC MMC(Modulation Multi-level Converter) was designed and verified by simulation.

• 한국시뮬레이션학회논문지
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• 제11권2호
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• pp.17-29
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• 2002

There is an increasing interest in high-performance A/D(Analog-to-Digital) converters for use in integrated analog and digital mixed processing systems. Pipeline A/D converter architectures coupled with BiCMOS process technology have the potential for realizing monolithic high-speed and high-accuracy A/D converters. In this paper, the design of 12bit pipeline BiCMOS A/D converter presented. A BiCMOS operational amplifier and comparator suitable for use in the pipeline A/D converter. Test/simulation results of the circuit blocks and the converter system are presented. The main features is low distortion track-and-hold with 0-300MHz input bandwidth, and a proprietary 12bit multi-stage quantizer. Measured value is DNL=${\pm}$0.30LSB, INL=${\pm}$0.52LSB, SNR=66dBFS and SFDR=74dBc at Fin=24.5MHz. Also Fabricated on 0.8um BiCMOS process.

• 조명전기설비학회논문지
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• 제16권5호
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• pp.7-13
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• 2002

고효율 고전력 밀도를 제공하는 공진형 컨버터에 있어서 스위치에 걸리는 전압 스트레스는 입력전압의 4∼5배 정도여서, 높은 정격의 소자를 필요로 하기 때문에 전도손실을 증가시킨다. 본 논문에서는 이러한 문제점을 해결하기 위해 제안했던 교번으로 동작하는 포워드 다중공진형 컨버터에 적용한 회로 형태를 다른 컨버터에 적용한 예를 제시하였다. 그리고 제안한 AT포워드 다중공진형 컨버터의 루프 이득 특성을 알아보기 위해 HP4194A 네트워크 해석기를 이용해 실험적으로 측정한 결과에 대해 고찰하였다.

• 스마트미디어저널
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• 제4권2호
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• pp.55-61
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• 2015

A bandwidth-enhanced ultra-wide band (UWB) CMOS balun-LNA is implemented as a part of a software defined radio (SDR) receiver which supports multi-band and multi-standard. The proposed balun-LNA is composed of a single-to-differential converter, a differential-to-single voltage summer with inductive shunt peaking, a negative feedback network, and a differential output buffer with composite common-drain (CD) and common-source (CS) amplifiers. By feeding the single-ended output of the voltage summer to the input of the LNA through a feedback network, a wideband balun-LNA exploiting negative feedback is implemented. By adopting a source follower-based inductive shunt peaking, the proposed balun-LNA achieves a wider gain bandwidth. Two LNA design examples are presented to demonstrate the usefulness of the proposed approach. The LNA I adopts the CS amplifier with a common gate common source (CGCS) balun load as the S-to-D converter for high gain and low noise figure (NF) and the LNA II uses the differential amplifier with the ac-grounded second input terminal as the S-to-D converter for high second-order input-referred intercept point (IIP2). The 3 dB gain bandwidth of the proposed balun-LNA (LNA I) is above 5 GHz and the NF is below 4 dB from 100 MHz to 5 GHz. An average power gain of 18 dB and an IIP3 of -8 ~ -2 dBm are obtained. In simulation, IIP2 of the LNA II is at least 5 dB higher than that of the LNA I with same power consumption.