• Journal of Sensor Science and Technology
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• v.31 no.5
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• pp.318-323
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• 2022

Barium titanate (BaTiO₃) is considered to be a beneficial ceramic material for multilayer ceramic capacitor (MLCC) applications because of its high dielectric constant and low dielectric loss. Numerous attempts have been made to improve the physical properties of BaTiO₃ in response to recent market trends by employing multicomponent alloying strategies. However, owing to its significant number of atomic combinations and unpredictable physical properties, finding a traditional experimental approach to develop multicomponent systems is difficult; the development of such systems is also time-consuming. In this study, 168 new structures were fabricated using special quasi-random structures (SQSs) of Ba_1-xCa_xTi_1-yZryO₃, and 1680 physical properties were extracted from first-principles calculations. In addition, we built an integrated database to manage the computational results, and will provide big data solutions by performing data analysis combined with AI modeling. We believe that our research will enable the global materials market to realize digital transformation through datalization and intelligence of the material development process.

• Korean Journal of Optics and Photonics
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• v.13 no.3
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• pp.215-222
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• 2002

Using an in-situ ellipsometer, we monitored the growth curve of optical recording media in real time. For confirmation of the thickness control using in-situ ellipsometry, we analyzed the deposited multi-layer sample made of Ge-Sb-Te alloy film and ZnS-Si0$_2$ dielectric films using an exsitu spectroscopic ellipsometer. The target material in the first sputtering gun is ZnS-SiO$_2$ as the protecting dielectric layer and that in the second gun is Ge$_2$sb$_2$Te$_{5}$ as the receding layer. While depositing ZnS-SiO$_2$, Ge$_2$Sb$_2$Te$_{5}$ and ZnS-SiO$_2$ films on c-Si substrate in sequence, we measured Ψ $\Delta$ in real time. Utilizing the complex refractive indices of Ge$_2$Sb$_2$Te$_{5}$ and ZnS-SiO$_2$ obtained from the analysis of spectroscopic ellipsometry data, the evolution of ellipsometric constants Ψ, $\Delta$ with thickness is calculated. By comparing the calculated evolution curve of ellipsometric constants with the measured one, and by analyzing the effect of density variation of the Ge$_2$Sb$_2$Te$_{5}$ recording layer on ellipsometric constants with thickness, we precisely monitored the growth rate of the Ge-Sb-Te multilayer and controlled the growth process. The deviation of the real thicknesses of Ge-Sb-Te multilayer obtained under the strict monitoring is post confirmed to be less than 1.5% from the target structure of ZnS-SiO$_2$(1400 $\AA$)IGST(200 $\AA$)$\mid$ZnS-SiO$_2$(200$\AA$).(200$\AA$).

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.134-134
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• 2011

High-k dielectric materials such as $HfO_2$, $ZrO_2$ and $Al_2O_3$ increase gate capacitance and reduce gate leakage current in MOSFET structures. This behavior suggests that high-k materials will be promise candidates to substitute as a tunnel barrier. Furthermore, stack structure of low-k and high-k tunnel barrier named variable oxide thickness (VARIOT) is more efficient.[1] In this study, we fabricated the $WSi_2$ nanocrystals nonvolatile memory device with $SiO_2/HfO_2/Al_2O_3$ tunnel layer. The $WSi_2$ nano-floating gate capacitors were fabricated on p-type Si (100) wafers. After wafer cleaning, the phosphorus in-situ doped poly-Si layer with a thickness of 100 nm was deposited on isolated active region to confine source and drain. Then, on the gate region defined by using reactive ion etching, the barrier engineered multi-stack tunnel layers of $SiO_2/HfO_2/Al_2O_3$ (2 nm/1 nm/3 nm) were deposited the gate region on Si substrate by using atomic layer deposition. To fabricate $WSi_2$ nanocrystals, the ultrathin $WSi_2$ film with a thickness of 3-4 nm was deposited on the multi-stack tunnel layer by using direct current magnetron sputtering system [2]. Subsequently, the first post annealing process was carried out at $900^{\circ}C$ for 1 min by using rapid thermal annealing system in nitrogen gas ambient. The 15-nm-thick $SiO_2$ control layer was deposited by using ultra-high vacuum magnetron sputtering. For $SiO_2$ layer density, the second post annealing process was carried out at $900^{\circ}C$ for 30 seconds by using rapid thermal annealing system in nitrogen gas ambient. The aluminum gate electrodes of 200-nm thickness were formed by thermal evaporation. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer with HP 41501A pulse generator, an Agillent 81104A 80MHz pulse/pattern generator and an Agillent E5250A low leakage switch mainframe. We will discuss the electrical properties for application next generation non-volatile memory device.

• Journal of the Microelectronics and Packaging Society
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• v.24 no.4
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• pp.39-46
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• 2017

This paper presents the fabrication of ceramic insulation layer on metallic heat spreading substrate, i.e. an insulated metal substrate, for planar type heater. Aluminum alloy substrate is preferred as a heat spreading panel due to its high thermal conductivity, machinability and the light weight for the planar type heater which is used at the thermal treatment process of semiconductor device and display component manufacturing. An insulating layer made of ceramic dielectric film that is stable at high temperature has to be coated on the metallic substrate to form a heating element circuit. Two technical issues are raised at the forming of ceramic insulation layer on the metallic substrate; one is delamination and crack between metal and ceramic interface due to their large differences in thermal expansion coefficient, and the other is electrical breakdown due to intrinsic weakness in dielectric or structural defects. In this work, to overcome those problem, selected metal oxide buffer layers were introduced between metal and ceramic layer for mechanical matching, enhancing the adhesion strength, and multi-coating method was applied to improve the film quality and the dielectric breakdown property.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.8
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• pp.781-787
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• 2004

In this paper, a novel dual and wide band aperture stacked patch antenna for Cellular/PCS/IMT-2000 base station is presented. It consists of single microstrip patch having notches along the radiating patch, two dielectric substrates and a form material. To achieve wide band characteristic, we utilize the coupling effect between the notched patch and the resonant aperture in the ground plane and by properly cutting notches on the patch, an aperture stacked patch antenna could be designed to yield dual frequency operation. By the proper choice of resonant aperture size and height of a foam material, dual and wide band characteristic could be realized the measured impedance bandwidth(1:1.5 VSWR) of designed antenna at lower band(860 MHz) reaches 77 MHz and covers the Cellular CDMA band(824∼894 MHz). The measured impedance bandwidth(1:1.5 VSMR) of the designed antenna at upper band(1,960 MHz) is about 550 MHz and covers both the PCS band(1,750∼l,870 MHz) and the for-2000 band(1,920∼2,170 MHz). Good broadside radiation with high gain(5.65∼7.4 dBi) characteristics have also been observed.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.4
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• pp.357-365
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• 2013

The 4 by 4 series slot sub-array antenna is proposed using substrate integrated waveguide(SIW) technology for 35 GHz of Ka band application. The proposed antenna is realized with multi-layered structure for compact size and easy integration features. 4 by 4 radiating slots are arrayed on top PCB with equal spacing and the feeding SIWs are arranged on middle and bottom PCBs for uniform power distribution. The multi-layered antenna is realized using RT/Duroid 5880 that has dielectric constant of 2.2 and the total antenna size is $750.76mm^2$. The individual parts such as radiators and feeding networks are simulated using full-wave simulator CST MWS. Furthermore, the total sub-array antenna also fabricated and measured the electrical performances such as impedance bandwidth under the criteria of -10 dB(490 MHz), maximum gain(18.02 dBi), sidelobe level(SLL)(-11.0 dB), and cross polarization discrimination (XPD)(-20.16 dB).

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.5
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• pp.44-53
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• 1999

This paper are reported a methodology and application for extracting parasitic capacitances in a multi-level interconnect semiconductor structure by a numerical technique. To calculate the parasitic capacitances between the interconnect lines, we employed finite element method (FEM) and calculated the distrubution of electric potential in the inter-metal layer dielecric(ILD) by solving the Laplace equation. The three-dimensional multi-level interconnect structure is generated directly from two-dimensional mask layout data by specifying process sequences and dimension. An exemplary structure comprising two metal lines with a dimension of 8.0$\times$8.0$\times$5.0$\mu\textrm{m}^3/TEX>, which is embedded in three dielectric layer, was simulated to extract the parasitic capacitances. In this calculation, 1960 nodes with 8892 tetrahedra were used in ULTRA SPARC 1 workstation. The total CPU time for the simulation was 28 seconds, while the memory size of 4.4MB was required.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.16 no.10
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• pp.6839-6845
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• 2015

The optimization design method for the broadband operation of the sleeve monopole was proposed to unify the multiple antennas essential to the multi-functional broadband wireless communication systems into one antenna. The structure of the sleeve part was optimized to enhance the impedance matching characteristics based on the theoretical analysis that sleeve part can works as the open stub. The thick monopole was used for the broadband operation. The radius of the sleeve and the permittivity of the dielectric inside the sleeve was optimized to enhance the impedance matching characteristics for the broadband operation. The optimized sleeve monopole having thick monopole shows broadband characteristics over 3:1 bandwidth, from 0.8 to 2.43 GHz, which is suitable for the commercial wireless communication system. The proposed broadband sleeve monopole can reduce multiple antennas essential to the multi-functional broadband systems to one antenna.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.7
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• pp.1267-1271
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• 2009

In this paper, a diplexer circuit to separate GSM from CDMA band is designed using a LTCC (Low Temperature Cofired Ceramic) multi-layer technology. In order to increase a integration capability of the diplexer, it is designed using 3-dimensional (3-D) multi-layer compact inductor and capacitors in e-layer LTCC substrate with a relative dielectric constant of 7. In order to achieve high selectivity of the bands, a shunt capacitor and inductor are designed in the high-pass filter (HPF) and low-pass filter (LPF), respectively. The size of the fabricated diplexer including CPW pads is 3,450 ${\times}$4,000 ${\times}$694 ${\mu}m^3$An insertion loss (IL) and return loss in GSM band are less than -1.35dB and more than -5.66dB,respectively. In the case of CDMA band, the IL of -1.54dBandRLof above -9.30dBare archived.

• The Journal of the Korea institute of electronic communication sciences
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• v.17 no.5
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• pp.759-766
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• 2022

In this paper, we propose a multi-band small antenna with CPW(Coplanar Waveguide) feeding structure WLAN(Wireless Local Area Network) and WiMAX (Worldwide Interoperability for Microwave Access) bands. The proposed antenna is designed two slit in the modified monopole type radiator and FR-4 substrate, which is thickness 1.0 mm, and the dielectric constant is 4.4. The size of proposed antenna is 15.1 mm⨯16.41 mm, and total size of proposed antenna is 17.5 mm⨯16.4 mm. From the fabrication and measurement results, From the fabrication and measurement results, bandwidths of 439 MHz (2.06 to 2.499 GHz), 840 MHz (3.31 to 4.25) and 1,315 MHz (5.23 to 6.545 GHz) were obtained on the basis of -10 dB impedance bandwidth. Also, 3D radiation pattern characteristics of the proposed antenna are displayed and measured gains 2.24 dBi, 2.83 dBi, and 2.0 dBi shown in the three frequency band, respectively.