• The Transactions of the Korean Institute of Electrical Engineers C
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• v.55 no.8
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• pp.399-403
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• 2006

An accurate constant output voltage provided by the analog memory cell may be used by the low power oscillator to generate an accurate low frequency output signal. This accurate low frequency output signal may be used to maintain long-term timing accuracy in host devices during sleep modes of operation when an external crystal is not available to provide a clock signal. Further, incorporation of the analog memory cell in the low power oscillator is fully implementable in a 0.35um Samsung standard CMOS process. Therefore, the analog memory cell incorporated into the low power oscillator avoids the previous problems in a oscillator by providing a temperature-stable, low power consumption, size-efficient method for generating an accurate reference clock signal that can be used to support long sleep mode operation.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.3
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• pp.149-151
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• 2015

Coupling with a ring of capacitors introduces in-phase coupling current in multi-stage LC oscillators, increasing coupling strength and phase spacing accuracy. Capacitive coupling is effective at high-frequency applications because it increases coupling strength with the operating frequency. However, capacitive loading from the ring lowers operating frequency and reduces the tuning range. Mathematical expressions of phase noise and phase spacing accuracy with capacitive coupling are examined here, and transistor-level simulations confirm the effectiveness of the capacitive coupling.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.6
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• pp.492-498
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• 2002

In this paper, we present the simulation results of multi-layer VCO(voltage controlled oscillator), which is composed of resonator, oscillator, and buffer circuit, using EM simulator and nonlinear RF circuit simulator. EM simulator is used for obtaining the EM(Electromagnetic) characteristics of conductor pattern as well as designing the multi-layer VCO. Obtained EM characteristics were used as real components in nonlinear RF circuit simulation. Finally the overall VCO was simulated by the nonlinear RF circuit simulator. The material for the circuit pattern was Ag and the dielectric was Dupont 951AT, which will be applied for LTCC process. The structure of multi-layer VCO is constructed with 4 conducting layer. Simulated results showed that the output level was about 4.5 [dBm], the phase noise was -104 [dBc/Hz] at 30 [kHz] offset frequency, the harmonics -8 dBc, and the control voltage sensitivity of 30 [MHz/V] with a DC current consumption of 9.5 [mA]. The size of VCO is $6{\times}9{\times}2 mm$(0.11 [cc]).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07b
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• pp.653-656
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• 2002

In this paper, we present the simulation results of multi-layer VCO(voltage controlled oscillator), which is composed of resonator, oscillator, and buffer circuit, using EM simulator and nonlinear RF circuit simulator. EM simulator is used for obtaining the EM(Electromagnetic) characteristics of conductor pattern as well as designing the multi-layer VCO. Obtained EM characteristics were used as real components in nonlinear RF circuit simulation. Finally the overall VCO was simulated by the nonlinear RF circuit simulator. The material for the circuit pattern was Ag and the dielectric was DuPont 951AT, which will be applied for LTCC process. The structure of multi-layer VCO is constructed with 4 conducting layer. Simulated results showed that the output level was about 4.5 [dBm], the phase noise was -104 [dBc/Hz] at 30 [kHz] offset frequency, the harmonics -8 dBc, and the control voltage sensitivity of 30 [MHz/V] with a DC current consumption of 9.5 [mA]. The size of VCO is $6{\times}9{\times}2$ mm(0.11[cc]).

• Proceedings of the KIEE Conference
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• 2001.11a
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• pp.96-99
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• 2001

In this paper, we present the simulation results of the multi-layer VCO(Voltage Controlled Oscillator), which is composed of the resonator, the oscillator and the buffer circuit. using EM simulator and nonlinear RF circuit simulator. EM simulator is used for obtaining the EM(Electromagnetic) characteristics of the conductor pattern as well as designing the multi-layer VCO. Obtained EM characteristics were used as real components in nonlinear RF circuit simulation. Finally the overall VCO was simulated using the nonlinear RF circuit simulator. The material for the circuit pattern was Ag and the dielectric was DuPont 951AT, which will be applied for LTCC process. The structure is constructed with 4 conducting layer. Simulated results showed that the output level was about 4.5[dBm], the phase noise was -104[dBc/Hz] at 30[kHz] offset frequency, the harmonics -8dBc, and the control voltage sensitivity of 30[MHz/V] with a DC current consumption of 9.5[mA]. The size of VCO is $6{\times}9{\times}2mm$(0.11[cc]).

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.6
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• pp.556-561
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• 2013

Interest in spin-torque oscillators (STOs) has been increasing due to their potential use in communication devices. In particular the magnetic tunnel junction-based STO (MTJ-STO) with high perpendicular anisotropy is gaining attention since it can generate high output power. In this paper, a circuit-level model for an in-plane magnetized MTJ-STO with partial perpendicular anisotropy is proposed. The model includes the perpendicular torque and the shift field for more accurate modeling. The bias voltage dependence of perpendicular torque is represented as quadratic. The model is written in Verilog-A, and simulated using HSPICE simulator with a current-mirror circuit and a multi-stage wideband amplifier. The simulation results show the proposed model can accurately replicate the experimental data such that the power increases and the frequency decreases as the value of the perpendicular anisotropy gets close to the value of the demagnetizing field.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11b
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• pp.410-413
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• 2001

In this paper, we present results of this that design of the multi-layer VCO(Voltage Controlled Oscillator), which is composed of the resonation circuit and the oscillation circuit, using EM simulator and nonlinear RF circuit simulator. EM simulator is used for acquiring EM(Electromagnetic) characteristics of conductor pattern as well as designing multi-layer VCO, Acquired EM characteristics of the circuit pattern was used like real components at nonlinear RF circuit simulator. Finally VCO is simulated at nonlinear RF circuit simulator. The material for the circuit pattern was Ag and the dielectric was DuPont #9599, which is applied for L TCC process. The structure is constructed with 4 conducting layer. Simulated results showed that the output level was about 1[dBm], the phase noise was 102 [dBc/Hz] at 30[kHz] offset frequency, the harmonics -8dBc, and the control voltage sensitivity of 30[MHz/V] with a DC current consumption of l0[mA]

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11a
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• pp.410-413
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• 2001

In this paper, we present results of this that design of the multi-layer VCO(Voltage Controlled Oscillator), which is composed of the resonation circuit and the oscillation circuit, using EM simulator and nonlinear RF circuit simulator. EM simulator is used for acquiring EM(Electromagnetic) characteristics of conductor pattern as well as designing multi-layer VCO, Acquired EM characteristics of the circuit pattern was used like real components at nonlinear RF circuit simulator. Finally VCO is simulated at nonlinear RF circuit simulator. The material for the circuit pattern was Ag and the dielectric was Dupont ＃9599, which is applied for LTCC process. The structure is constructed with 4 conducting layer. Simulated results showed that the output level was about 1[dBm], the phase noise was 102 [dBc/Hz] at 30[kHz] offset frequency, the harmonics -8dBc, and the control voltage sensitivity of 30[MHz/V] with a DC current consumption of 10[mA].

• Nanomaterials
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• v.12 no.22
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• pp.4096-4107
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• 2022

In this work, a hybrid-phase transition field-effects-transistor (hyper-FET) integrated with phase-transition materials (PTM) and a multi-nanosheet FET (mNS-FET) at the 3 nm technology node were analyzed at the device and circuit level. Through this, a benchmark was performed for presenting device design guidelines and for using ultra-low-power applications. We present an optimization flow considering hyper-FET characteristics at the device and circuit level, and analyze hyper-FET performance according to the phase transition time (TT) and baseline-FET off-leakage current (I_OFF) variations of the PTM. As a result of inverter ring oscillator (INV RO) circuit analysis, the optimized hyper-FET increases speed by +8.74% and reduces power consumption by -16.55%, with IOFF = 5 nA of baseline-FET and PTM TT = 50 ps compared to the conventional mNS-FET in the ultra-low-power region. As a result of SRAM circuit analysis, the read static noise margin is improved by 43.9%, and static power is reduced by 58.6% in the near-threshold voltage region when the PTM is connected to the pull-down transistor source terminal of 6T SRAM for high density. This is achieved at 41% read current penalty.