• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.9
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• pp.1605-1614
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• 2008

This paper proposed a new VLSI architecture of motion estimation (ME) and compensation (MC) for efficient video compression and implemented it to hardware. ME is generally calculated using SAD result. So we proposed a new arithmetic method for SAD. The proposed SAD calculation method increases arithmetic efficiency and decreases external memory usage. Finally it increases performance of ME/MC. The proposed ME/MC hardware was implemented to ASIC with TSMC 90nm HVT CMOS library. The implemented hardware occupies about 330K gates and stably operates the clock frequency of 143MHz.

• Proceedings of the Korea Multimedia Society Conference
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• 2002.05c
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• pp.489-494
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• 2002

컴퓨터 통신 서비스나 인터넷의 비약적인 발전으로 복잡해진 지식 체계에 따른 다양해진 정보를 신속 정확하게 이용할 수 있고, 전 세계의 모든 정보와 문화를 쉽게 접할 수 있게 되었다. 본 논문에서는 모션캡쳐를 이용하여, 교육용 타이틀, 애니메이션 및 게임 등의 제작을 위한 멀티미디어 디지털 라이브러리를 구축하고, 여러 사용자들이 쉽고 빠르게 동영상 및 영화, CF, 게임 등에 응응함으로써, 다양한 디지털 컨텐츠 개발을 목적으로 한다.

• 한국HCI학회:학술대회논문집
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• 2009.02a
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• pp.378-383
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• 2009

In these days, many systems are equipped with people to infer their intention and provide the corresponding service. People always carry their own mobile device with various sensors, and the accelerator takes a role in this environment. The accelerator collects motion information, which is useful for the development of gesture-based user interfaces. Generally, it needs to develop an effective method for the mobile environment that supports relatively less computational capability since huge computation is required to recognize time-series patterns such as gestures. In this paper, we propose a 2-stage motion recognizer composed of low-level and high-level motions based on the motion library. The low-level motion recognizer uses the dynamic time warping with 3D acceleration data, and the high-level motion is defined linguistically with the low-level motions.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.3C
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• pp.102-111
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• 2005

In this paper, we propose an advanced hardware architecture for the fast inter prediction engine of the video coding standard MPEG-4 AVC. We describe the algorithm and derive the hardware architecture emphasizing and real time operation of the quarter_pel based motion estimation. The fast inter prediction engine is composed of block segmentation, motion estimation, motion compensation, and the fast quarter_pel calculator. The proposed architecture has been verified by ARM-interfaced emulation board using Excalibur & Virtex2 FPGA, and also by synthesis on Samsung 0.18 um CMOS technology. The synthesis result shows that the proposed hardware can operate at 62.5MHz. In this case, it can process about 88 QCIF video frames per second. The hardware is being used as a core module when implementing a complete MPEG-4 AVC video encoder chip for real-time multimedia application.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.2
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• pp.85-92
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• 2009

This paper proposes a full-search block-matching motion estimation circuit with hybrid architecture combining systolic arrays and adder trees for an MPEG-4 encoder. The proposed circuit uses systolic arrays for motion estimation with a small number of clock cycles and adder trees to reduce required circuit resources. The interpolation circuit for 1/2 pixel motion estimation consists of six adders, four subtracters and ten registers. We improved the circuit performance by resource sharing and efficient scheduling techniques. We described the motion estimation circuit for integer and 1/2 pixels at RTL in Verilog HDL. The logic-level circuit synthesized by using 130nm standard cell library contains 218,257 gates and can process 94 D1($720{\times}480$) image frames per second.

• Journal of the Korean BIBLIA Society for library and Information Science
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• v.16 no.2
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• pp.157-175
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• 2005

The main purpose of this paper is to explain and analyze visual descriptors of MPEG-7 for representing multimedia content. This study describes MPEG-7 visual descriptors that are made of color, shape, texture, and motion using some examples and application areas in detail. As a result, those visual descriptors can represent the rich and deep features in multimedia contents domain. Also, the use of those descriptors will increase the retrieval effectiveness as well as the interoperability among systems through the consistency of the content representation.

• Journal of the Earthquake Engineering Society of Korea
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• v.20 no.5
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• pp.331-340
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• 2016

It is important to select proper ground motions for obtaining accurate results from response history analyses. The purpose of this study is to propose an accurate and efficient method that does not require excessive computation for selecting and scaling ground motions to match target response spectrum mean and variance. The proposed method is conceptually simple and straightforward, and it does not use a simulation algorithm that requires a sophisticated subroutine program. In this method, the desired number of ground motions are sequentially scaled and selected from a ground motion library. The proposed method gives the best selection results using Sum of Square Error and has the smallest value(=0.14). Also, The accuracy and consistency of the proposed method are verified by comparing the selection results of the proposed method with those of existing methods.

• Journal of the Korean BIBLIA Society for library and Information Science
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• v.24 no.3
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• pp.181-198
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• 2013

This study takes aim at finding how effective the usage of 'Read to Dogs' is for self-respect and reading improvement of elementary school students. For this, this study was compared and analyzed with pretest and posttest using 'tree pictures' of HTP and 'family pictures with motion' of KFD through performing, surveying, and art-therapy treatments. The result of this study showed that reading program using a reading -assistance- dog has a good effect on self-respect of children with reading inactivity. Also, this result will be used as useful information in developing and operating programs for children with reading inactivity in libraries and schools.

• Journal of Ocean Engineering and Technology
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• v.33 no.3
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• pp.245-251
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• 2019

When an offshore foundation is exposed to waves and currents, local scour could develop around a pile and even lead to structural failure. Therefore, understanding and predicting the scour due to sediment transport around foundations are important in the engineering design. In this study, the flow and scour around a monopole foundation exposed to a current were investigated using a method that coupled the computational fluid dynamics (CFD) and discrete element method (DEM). The open source computation fluid dynamics library OpenFOAM and a sediment transport library were coupled in the OpenFOAM platform. The incipient motion of the particle was validated. The flow fields and sediment transport around the monopole were simulated. The scour depth development was simulated and compared with existing experimental data. For the upstream scour hole, the equilibrium scour depth could be reproduced qualitatively, and it was underestimated by about 23%.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.7
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• pp.53-60
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• 2009

Motion estimation for H.264/AVC video CODEC is very complex and requires a huge amount of computational efforts because it uses multiple reference frames and variable block sizes. We propose the architecture of high-performance integer-pixel motion estimation circuit based on fast algorithms for multiple reference frame selection, block matching, block mode decision and motion vector estimation. We also propose the architecture of high-performance interpolation circuit for sub-pixel motion estimation. We described the RTL circuit in Verilog HDL and synthesized the gate-level circuit using 130nm standard cell library. The integer-pixel motion estimation circuit consists of 77,600 logic gates and four $32\times8\times32$-bit dual-port SRAM's. It has tile maximum operating frequency of 161MHz and can process up to 51 D1 (720$\times$480) color in go frames per second. The fractional motion estimation circuit consists of 22,478 logic gates. It has the maximum operating frequency of 200MHz and can process up to 69 1080HD (1,920$\times$1,088) color image frames per second.