• 제목/요약/키워드: Module sequence

검색결과 208건 처리시간 0.021초

펄스 폭 가변을 이용한 X-대역 고효율 60 W 전력 증폭 모듈 설계 (Design of X-Band High Efficiency 60 W SSPA Module with Pulse Width Variation)

  • 김민수;구융서;이영철
    • 한국전자파학회논문지
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    • 제23권9호
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    • pp.1079-1086
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    • 2012
  • 본 논문에서는 반도체형 전력 증폭기의 바이어스를 개선하기 위하여 순차 제어 회로와 펄스 폭 가변 회로를 적용한 X-대역 60 W 고효율 전력 증폭 모듈을 설계하였다. 순차 제어 회로는 전력 증폭 모듈을 구성하는 각 증폭단의 GaAs FET의 드레인 전원을 순차적으로 스위칭하도록 회로를 구성하였다. 드레인 바이어스 전원의 펄스 폭을 RF 입력 신호의 펄스 폭보다 넓게 하여 전력 증폭 모듈의 입력 신호가 있을 때만 스위칭 회로를 순차적으로 구동시킴으로써 전력 증폭 모듈의 열화에 따른 출력 신호의 왜곡과 효율을 향상시킬 수 있다. 60 W 전력 증폭 모듈은 고출력 GaAs FET를 이용하여 전치 증폭단, 구동 증폭단과 주전력 증폭단으로 구성하였으며, 주전력 증폭단은 전력결합기를 이용한 평형증폭기 구조로 구현하였다. 설계된 전력 증폭 모듈은 9.2~9.6 GHz에서 듀티사이클 10 %로 동작시켰을 때 50 dB의 전력 이득, 펄스 주기 1 msec, 펄스 폭 100 us, 출력 전력 60 W에서 동작함에 따라 펄스-SSPA 형태로 반도체 펄스 압축 레이더 등에 적용할 수 있다.

Various Pulse Forming of Pulsed $CO_2$ laser using Multi-pulse Superposition Technique

  • Chung, Hyun-Ju;Kim, Hee-Je
    • KIEE International Transactions on Electrophysics and Applications
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    • 제11C권4호
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    • pp.127-132
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    • 2001
  • We describe the pulse forming of pulsed $CO_2$laser using multi-pulse superposition technique. A various pulse length, high duty cycle pulse forming network(PFN) is constructed by time sequence. That is, this study shows a technology that makes it possible to make various pulse shapes by turning on SCRs of three PFN modules consecutively at a desirable delay time with the aid of PIC one-chip microprocessor. The power supply for this experiment consists of three PFN modules. Each PFN module uses a capacitor, a pulse forming inductor, a SCR, a High voltage pulse transformer, and a bridge rectifier on each transformer secondary. The PFN modules operate at low voltage and drive the primary of HV pulse transformer. The secondary of the transformer has a full-wave rectifier, which passes the pulse energy to the load in a continuous sequence. We investigated laser pulse shape and duration as various trigger time intervals of SCRs among three PFN modules. As a result, we can obtain laser beam with various pulse shapes and durations from about 250 $mutextrm{s}$ to 600 $mutextrm{s}$.

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퍼지셋을 이용한 퍼어싱 및 굽힘공정을 갖는 전기제품의 공정순서 결정기법 개발 (Development of a Process Sequence Determination Technique by Fuzzy Set Theory for Electric Product with Piercing and Bending Operations)

  • 김재훈;김철
    • 한국정밀공학회지
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    • 제22권9호
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    • pp.137-146
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    • 2005
  • This paper describes a research work to develop a computer-aided design for the product made by progressive working of bending and piercing. An approach to the system for progressive working is based on the knowledge-based rules. Knowledge for the system is formulated from plasticity theories, experimental results and the empirical knowledge of field experts. The system has been written in AutoLISP on the AutoCAD with a personal computer and is composed of three main modules, which are input and shape treatment, flat pattern layout, strip layout modules. The system is designed by considering several factors, such as piercing and bending sequences by fuzzy set theory, complexities of blank geometry, punch profiles, and the availability of a press equipment. Strip layout drawing generated in the strip layout module is presented in 3-D graphic forms, including piercing and bending sequences with punch profiles divided into for external area. Results obtained using the modules enable the manufacturer for progressive working of electric products to be more efficient in this field.

철도신호 소프트웨어 테스팅을 위한 MSC 기반 테스트케이스 생성 모듈 (MSC-based Test-case Generation Module for Railway Signaling Software Testing)

  • 황종규;백종현
    • 전기학회논문지P
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    • 제64권3호
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    • pp.138-142
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    • 2015
  • Most of the existing studies on functional safety testing for the railway signaling system software have focused on verifying the functional safety through the monitoring of internal memory embedded railway signaling system. However, the railway signaling system is one of the typical embedded control system in the railway sector, and the embedded software has a characteristic of generating an appropriate outputs through the combination of internal processing in consideration of the current internal status and external input. Therefore, the test approach of using the interface communication channel can be effective way for the functional testing for railway signaling system software in consideration of these characteristic. Since a communication interface specification of the railway signal system has a the properties of the sequence input and output signals, test-case for software testing is the most effective methodology by MSC (Message Sequence Chart) language, one of the graphic language. The MSC-based test-case generating methodology for signaling system software was proposed in this paper.

전기제품의 프로그레시브 가공을 위한 통합적 CAD 시스템 (An Integrated CAD System for Progressive Working of Electronic Products)

  • 김재훈;김영민;김철;최재찬
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2000년도 춘계학술대회 논문집
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    • pp.829-832
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    • 2000
  • This paper describes a research work of developing a computer-aided design of product with bending and piercing for progressive working. An approach to the CAD system is based on the knowledge-based rules. Knowledge fur the CAD system is formulated from plasticity theories, experimental results and the empirical knowledge of field experts. The system has been written in AutoLISP on the AutoCAD with a personal computer and is composed of three main modules, which are input and shape treatment, flat pattern layout and strip layout module. Based on knowledge-based rules, the system is designed by considering several factors, such as radius and angle of bend, material and thickness of product, complexities of blank geometry and punch profile, bending sequence, and availability of press. Strip layout drawing automatically generated by piercing with punch profiles divided into for external area is simulated in 3-D graphic forms, including bending sequences for the product with piercing and bending. Results obtained using the modules enable the manufacturer of electronic products to be more efficient in this field.

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IP 역추적 설계 및 보안감사 자료생성에 관한 연구 (A Study regarding IP Traceback designs and security audit data generation.)

  • 이인희;박대우
    • 한국컴퓨터정보학회지
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    • 제15권1호
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    • pp.53-64
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    • 2007
  • 본 논문에서는 최근의 해킹사고에서 침입자는 피해시스템에서 자신의 IP주소 노출을 피하기 위하여 피해 시스템을 직접 공격하지 않고 Stepping stone(경유지)을 이용하여 우회 공격을 수행한다. 본 논문에서는 로그기반에서는 네트워크 감사 정책을 이용하고, TCP 기반에서는 CIS, AIAA 기법과 네트워크 기반에서는 Thumbprints Algorithm, Timing based Algorithm, TCP Sequence number를 이용한 알고리즘, Sleep Watermark Tracking 기법을 이용하여 역추적 시스템을 제시하였으며, 현 인터넷 망의 구성의 물리적 또는 논리적 복잡성이 크다는 단점을 보완하기 위해, 날로 발전하고 빠른 기술 개발 속도를 갖는 침입 기술에 대응하기위해 하나의 시스템에 하나의 모듈이 아닌 기존의 알고리즘을 이용해 효과적인 역추적 시스템을 제시 하려 한다.

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전기제품의 프로그레시브 가공을 위한 공정설계 자동화 시스템 (An Automated Process Planning System for Progressive Working of Electric Products)

  • 김재훈;김철;최재찬
    • 한국정밀공학회지
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    • 제17권8호
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    • pp.198-206
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    • 2000
  • This paper describes a research work of developing automated progressive process planning system for working electric products. An approach to the CAD system in based on the knowledge-based rules. Knowledge for the CAD system is formulated from plasticity theories experimental results and the empirical knowledge of field experts. The system has been written in AutoLISP on the AutoCAD with a personal computer and is composed of three main modules which are input and shape treatment flat pattern layout and strip layout module. Based on knowledge-based rules the system is design by considering several factors such as radius and angle of bend material and thickness of product complexities of blank geometry and punch profile bending sequence and availability of press. Strip layout drawing automatically generated by piercing with punch profiles divided into for external area is simulated in 3-D graphic forms including bending sequences for the product with piercing and bending. Results obtained using the modules enable the manufacture of electronic products to be more efficient in this field.

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구속을 갖는 굽힘 및 피어싱용 제품의 프로그레시브 가공을 위한 자동화된 CAD 시스템 (An automated CAD System of Product with Bending Constraints and Piercing for Progressive Working)

  • 최재찬;김철
    • 한국정밀공학회지
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    • 제16권11호
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    • pp.174-182
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    • 1999
  • This paper describes a research work of developing a computer-aided design of product with bending constraints and piercing for progressive working. an approach to the CAD system is based on the knowledge-based rules. Knowledge for the CAD system is formulated from plasticity theories, experimental results and the empirical knowledge of field experts. The system has been written AutoLISP on the AutoCAD with a personal computer and is composed of four main modules, which are input and shape treatment, flat pattern layout, production feasibility check, and strip-layout module. Based on knowledge-based rules, the system is designed by considering several factors, such as radius and angle of bend, material and thickness of product, complexities of blank geometry and punch profile, bending sequence, availability of press. Strip layout drawing generated by piercing with punch profiles divide into automatically for external area is shown into graphic forms, including bending sequences for the product with piercing and bending constraints. Results obtained using the modules enable the designer and manufacturer of piercing and bending dies to be more efficient in this field.

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모바일 TFT-LCD를 위한 새로운 화질 최적화 시스템 (A New Image Quality Optimization System for Mobile TFT-LCD)

  • 류지열;노석호
    • 한국정보통신학회:학술대회논문집
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    • 한국해양정보통신학회 2008년도 춘계종합학술대회 A
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    • pp.734-737
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    • 2008
  • 본 논문은 새로운 형태의 TFT-LCD 자동 화질 최적화 시스템을 제안한다. 또한 참조 감마 곡선과의 6-점 프로그램 정합 기술을 이용한 새로운 알고리즘 및 자동 전압 설정 알고리즘을 제안한다. 이러한 시스템은 평균 감마 오차, 감마 조정 시간 및 플리커 등을 줄이기 위해 모바일 LCD 구동 IC 내의 감마 조정 레지스터들과 전압 설정 레지스터들을 자동적으로 제어한다. 개발된 알고리즘과 프로그램은 범용 LCD 모듈에 적용 가능하다. 제안된 최적 화질 향상 시스템은 측정 대상이 되는 모듈 (MUT, LCD 모듈), 제어 프로그램, 휘도 측정용 멀티미디어 디스플레이 측정기 및 인터페이스용 제어 보드로 구성되어 있다. 제어 보드는 DSP와 FPGA로 구성되어 있고, RGB 및 CPU와 같은 다양한 인터페이스들을 지원한다. 개발된 자동 화질 최적화시스템은 기존의 시스템에 비해 현저히 짧은 감마 조정시간, 적은 플리커 및 적은 평균 감마 오차를 보였다. 본 논문에서 제안하는 시스템은 최적 감마 곡선 및 자동 전압 설정을 이용하기 때문에 개발 공정 시간을 단축시키고, 고화질의 TFT-LCD를 제공하는데 아주 유용하다.

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Experimental investigation of Scalability of DDR DRAM packages

  • Crisp, R.
    • 마이크로전자및패키징학회지
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    • 제17권4호
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    • pp.73-76
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    • 2010
  • A two-facet approach was used to investigate the parametric performance of functional high-speed DDR3 (Double Data Rate) DRAM (Dynamic Random Access Memory) die placed in different types of BGA (Ball Grid Array) packages: wire-bonded BGA (FBGA, Fine Ball Grid Array), flip-chip (FCBGA) and lead-bonded $microBGA^{(R)}$. In the first section, packaged live DDR3 die were tested using automatic test equipment using high-resolution shmoo plots. It was found that the best timing and voltage margin was obtained using the lead-bonded microBGA, followed by the wire-bonded FBGA with the FCBGA exhibiting the worst performance of the three types tested. In particular the flip-chip packaged devices exhibited reduced operating voltage margin. In the second part of this work a test system was designed and constructed to mimic the electrical environment of the data bus in a PC's CPU-Memory subsystem that used a single DIMM (Dual In Line Memory Module) socket in point-to-point and point-to-two-point configurations. The emulation system was used to examine signal integrity for system-level operation at speeds in excess of 6 Gb/pin/sec in order to assess the frequency extensibility of the signal-carrying path of the microBGA considered for future high-speed DRAM packaging. The analyzed signal path was driven from either end of the data bus by a GaAs laser driver capable of operation beyond 10 GHz. Eye diagrams were measured using a high speed sampling oscilloscope with a pulse generator providing a pseudo-random bit sequence stimulus for the laser drivers. The memory controller was emulated using a circuit implemented on a BGA interposer employing the laser driver while the active DRAM was modeled using the same type of laser driver mounted to the DIMM module. A custom silicon loading die was designed and fabricated and placed into the microBGA packages that were attached to an instrumented DIMM module. It was found that 6.6 Gb/sec/pin operation appears feasible in both point to point and point to two point configurations when the input capacitance is limited to 2pF.