• 한국신재생에너지학회:학술대회논문집
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• 2011.05a
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• pp.122.1-122.1
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• 2011

Phosphorus is known to pile-up at the silicon surface when it is thermally oxidized. A thin layer, about 40nm thick from the silicon surface, is created containing more phosphorus than the bulk of the emitter. This layer has a gaussian profile with the peak at the surface of the silicon. In this study the pile-up effect was studied if this layer can act as a front surface field for solar cells. The effect was also tested if its high dose of phosphorus at the silicon surface can lower the contact resistance with the front metal contact. P-type wafers were first doped with phosphorus to create an n-type emitter. The doping was done using either a furnace or ion implantation. The wafers were then oxidized using dry thermal oxidation. The effect of the pile-up as a front surface field was checked by measuring the minority carrier lifetime using a QSSPC. The contact resistance of the wafers were also measured to see if the pile-up effect can lower the series resistance.

• 한국신재생에너지학회:학술대회논문집
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• 2011.05a
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• pp.129.1-129.1
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• 2011

a-Si:H/c-Si 구조의 이종접합 태양전지 전면 투명전도막으로 Indium tin oxide(ITO) 박막의 조건에 따라 태양전지 특성을 연구하였다. ITO 박막은 파우더 타겟으로 마그네트론 스퍼터링 방식으로 성막하였고, 증착 온도(Ts)에 따라 전기적, 광학적 특성을 비교, 분석하였다. 기판 증착 온도가 증가할수록 박막의 저항이 낮아지는 것으로 나타났으며 $350^{\circ}C$ 조건에서 가장 낮은 저항($34.2{\Omega}$/sq)을 보였다. 투과도 또한 기판 증착 온도가 올라갈수록 전반적인 향상을 나타냈다. a-Si:H/c-Si 기판의 MCLT(minority carrier lifetime)는 $350^{\circ}C$에서 최적($359{\mu}s$)의 결과를 나타냈다. 그 이상의 기판 온도에서는 오히려 감소하였는데, 이는 높은 온도에서의 a-Si:H/c-Si 계면의 열손상으로 판단된다.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.743-746
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• 2003

We have successfully used hydrophobic direct-wafer bonding, along with H-induced layer splitting of Ge, to transfer 700nm think, single-crystal Ge films to Si substrates. Optical and electrical properties have been also observed on these samples. Triple-junction solar cell structures gown on these Ge/Si heterostructure templates show comparable photoluminescence intensity and minority carrier lifetime to a control structure grown on bulk Ge. When heavily doped p$^{+}$Ge/p$^{+}$Si wafer bonded heterostructures were bonded, ohmic interfacial properties with less than 0.3Ω$\textrm{cm}^2$ specific resistance were observed indicating low loss thermal emission and tunneling processes over and through the potential barrier. Current-voltage (I-V) characteristics in p$^{+}$Ge/pSi structures show rectifying properties for room temperature bonded structures. After annealing at 40$0^{\circ}C$, the potential barrier was reduced and the barrier height no longer blocks current flow under bias. From these observations, interfacial atomic bonding structures of hydrophobically wafer bonded Ge/Si heterostructures are suggested.ested.

• New & Renewable Energy
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• v.8 no.1
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• pp.24-34
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• 2012

The main issue of boron doped p-type czochralski-grown silicon solar cells is the degradation when they are exposed to light or minority carriers injection. This is due to the meta-stable defect such as boron-oxygen in the Cz-Si material. Although a clear explanation is still researching, recent investigations have revealed that the Cz-Si defect is related with the boron and the oxygen concentration. They also revealed how these defects act a recombination centers in solar cells using density function theory (DFT) calculation. This paper reviews the physical understanding and gives an overview of the degradation models. Therefore, various methods for avoiding the light-induced degradation in Cz-Si solar cells are compared in this paper.

• Proceedings of the Materials Research Society of Korea Conference
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• 2012.05a
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• pp.99.2-99.2
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• 2012

현재 양산 중인 대부분의 결정질 실리콘 태양전지는 p-type 실리콘 기판의 전면에 인 (phosphorus) 을 확산시켜 에미터로 사용한 스크린 프린티드 태양전지 (Screen Printed Solar Cells) 이다. 위 태양전지의 단점은 p-type 기판의 광열화현상 (Light Induced Degradation) 문제와 후면 알루미늄 금속 전극으로 인한 휨 현상 등이 있다. 이러한 단점을 해결하기 위해 n-type 기판의 전면에 보론 (Boron) 을 도핑하여 에미터로 사용하고, 후면 전계 (Back Surface Field) 로 인 (Phosphorus)을 도핑한 태양전지에 대한 연구가 활발히 진행 중이다. 본 연구에서는, 튜브 전기로 (tube furnace) 를 이용해 n-type 실리콘 웨이퍼 전면에 보론 도핑을 하고 이와 마찬가지로 웨이퍼 후면에 인 도핑을 실시하였다. 그리고 전면과 후면의 패시베이션을 위해 얇게 산화막을 형성한 후 실리콘 질화막 (SiNx) 을 증착하였다. 에미터와 후면 전계 그리고 패시베이션 층의 특성을 평가하기 위해 QSSPC (Quasi-Steady-State PhotoConductance) 로 소수반송자 수명 (Minority Carrier Lifetime) 과 포화 전류 (Saturation current) 값을 측정하였다.

• Nuclear Engineering and Technology
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• v.49 no.1
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• pp.209-215
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• 2017

Fast neutron irradiation was used to improve the switching speed of a 600-V nonpunch-through insulated gate bipolar transistor. Fast neutron irradiation was carried out at 30-MeV energy in doses of $1{\times}10^8n/cm^2$, $1{\times}10^9n/cm^2$, $1{\times}10^{10}n/cm^2$, and $1{\times}10^{11}n/cm^2$. Electrical characteristics such as current-voltage, forward on-state voltage drop, and switching speed of the device were analyzed and compared with those prior to irradiation. The on-state voltage drop of the initial devices prior to irradiation was 2.08 V, which increased to 2.10 V, 2.20 V, 2.3 V, and 2.4 V, respectively, depending on the irradiation dose. This effect arises because of the lattice defects generated by the fast neutrons. In particular, the turnoff delay time was reduced to 92 nanoseconds, 45% of that prior to irradiation, which means there is a substantial improvement in the switching speed of the device.

• Korean Journal of Materials Research
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• v.30 no.5
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• pp.262-266
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• 2020

In this paper, we investigated the effect of the passivation stack with Al₂O₃, hydrogenated silicon nitride (SiN_x:H) stack and Al₂O₃, silicon oxynitride (SiON_x) stack in the n type bifacial solar cell on monocrystalline silicon. SiNx:H and SiON_x films were deposited by plasma enhanced chemical vapor deposition on the Al₂O₃ thin film deposited by thermal atomic layer deposition. We focus on passivation properties of the two stack structure after laser ablation process in order to improve bifaciality of the cell. Our results showed SiN_x:H with Al₂O₃ stack is 10 mV higher in implied open circuit voltage and 60 ㎲ higher in minority carrier lifetime than SiON_x with Al₂O₃ stack at Ni silicide formation temperature for 1.8% open area ratio. This can be explained by hydrogen passivation at the Al₂O₃/Si interface and Al₂O₃ layer of laser damaged area during annealing.

• Korean Journal of Materials Research
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• v.4 no.8
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• pp.921-926
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• 1994

The characteristics of gate oxide significantly depend on the last chemical solution used in cleaning process. The standard RCA, HF-last, SC1-last, and HF-only processes are the pre-gate oxide cleaning processes utilized in this experiment. Cleaning process was followed by thermal oxidation in oxidation furnace at $900^{\circ}C$. A 100$\AA$ gate oxide was grown and characterized with using lifetime detector, VPD AAS, SIMS, TEM, and AFM. The results of HF-last and HF-only were shown to be very effective to remove the metallic impurities. And these two splits also showed long minority carrier lifetimes. The surface and interface morphologies of the oxide were examined with AFM and TEM. The rough surface morphologies were observed with the cleaning splits containing the SC1 solution. The smooth surface and interface was observed with the HF-only cleaning process.

• Korean Journal of Materials Research
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• v.22 no.9
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• pp.450-453
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• 2012

In crystalline solar cells, the substrate itself constitutes a large portion of the fabrication cost as it is derived from semiconductor ingots grown in costly high temperature processes. Thinner wafer substrates allow some cost saving as more wafers can be sliced from a given ingot, although technological limitations in slicing or sawing of wafers off an ingot, as well as the physical strength of the sliced wafers, put a lower limit on the substrate thickness. Complementary to these economical and techno-physical points of view, a device operation point of view of the substrate thickness would be useful. With this in mind, BC-BJ Si and GaAs solar cells are compared one to one by means of the Medici device simulation, with a particular emphasis on the substrate thickness. Under ideal conditions of 0.6 ${\mu}m$ photons entering the 10 ${\mu}m$-wide BC-BJ solar cells at the normal incident angle (${\theta}=90^{\circ}$), GaAs is about 2.3 times more efficient than Si in terms of peak cell power output: 42.3 $mW{\cdot}cm^{-2}$ vs. 18.2 $mW{\cdot}cm^{-2}$. This strong performance of GaAs, though only under ideal conditions, gives a strong indication that this material could stand competitively against Si, despite its known high material and process costs. Within the limitation of the minority carrier recombination lifetime value of $5{\times}10^{-5}$ sec used in the device simulation, the solar cell power is known to be only weakly dependent on the substrate thickness, particularly under about 100 ${\mu}m$, for both Si and GaAs. Though the optimum substrate thickness is about 100 ${\mu}m$ or less, the reduction in the power output is less than 10% from the peak values even when the substrate thickness is increased to 190 ${\mu}m$. Thus, for crystalline Si and GaAs with a relatively long recombination lifetime, extra efforts to be spent on thinning the substrate should be weighed against the expected actual gain in the solar cell output power.

• Journal of the Korean Solar Energy Society
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• v.30 no.6
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• pp.16-21
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• 2010

It is well-known that Boron-doped Cz Si solar cells suffer light-induced degradation due to boron-oxygen defect which is responsible of a reduction in lifetime and hence efficiency. In this paper, we assume that PV solar cell has been connected with variable load to account the real operating condition and it shows different light-induced degradation of Si solar cell. To evaluate the effect of light-induced degradation for solar cell with various load, Single crystalline solar cells are connected with open and short circuits during light exposure. Isc-Voc curve evaluate light induced degradation of solar cells and the reason is explained as a change for serial resistance. From the results, Electrical characteristics of solar cells show better performance under short circuit conditions, after light exposure.