• 전력전자학회논문지
• /
• 제3권3호
• /
• pp.240-245
• /
• 1998

본 논문에서는 전동기의 슬라이딩 모드 제어기가 설계되었다. 슬라이딩 모드 제어기의 단점인 채터링 현상을 제거하기 위해 연속치 제어입력이 제안되었으며 제안된 기법으로 고속 마이크로 프로세서인 DSP를 이용한 유도전동기의 속도제어를 보였다. 슬라이딩 모드하에서의 유도 전동기의 각속도가 지정된 궤적을 추종하도록 동작한다. 실험 결과를 통해 제안된 방법의 유용성을 보였다.

• Journal of Power Electronics
• /
• 제9권3호
• /
• pp.410-417
• /
• 2009

This paper represents a design and implementation of a digital controller for a multi-phase synchronous buck converter (SBC) using a digital signal processor (DSP). The multi-phase SBC has generally been used for a voltage regulation module (VRM) of a microprocessor because of its high current handling capability at a low output voltage. The VRM requires high control performance of tight output regulation, high slew rate, and load sharing capability of multiple converters. In order to achieve these requirements, the design and implementation of a digital control system for a multi-phase SBC are presented in this paper. The digital PWM generation, current sensing, and voltage and current controller using a DSP TMS320F2812 are considered. The experimental results are provided to show the validity of the implemented digital control system.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1988년도 추계학술대회 논문집 학회본부
• /
• pp.426-429
• /
• 1988

A Microprocessor Based Digital Control System is inherently contained a control lag for processing the control program and a data detection time lag. This two types of time lag may cause the system to become unstable. In this paper proposed predictive state observer is used to solve the two time lag problems. I-P control algorithm is used to attain deadbeat response by adjusting the observer gain to overcome the parameter variation or with disturbance. The speed response shows good performance through computer simulation.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1988년도 추계학술대회 논문집 학회본부
• /
• pp.314-317
• /
• 1988

For the current control of brushless motor, it is possible to generate the reference current waveforms by a microcomputer. But, with a single microprocessor, those reference current waveforms are not produced in smooth shapes because of computation speed. To solve this problem an attempt hag been made in this paper to use two processors, where the additional processor is to transform the current space vectors. This approach does not increase the complexity of the design considerably compared to the cage of using a single processor.

• 전자공학회논문지A
• /
• 제31A권10호
• /
• pp.132-140
• /
• 1994

In this paper, we consider the area-minimal implementation of the instruction decoder for microprogrammed processors such as modern CISC-type microprocessor. We formulate it as a constrained output encoding problem and, based on simulated annealing algorithm, propose efficient heuristic solution methods both for PLA and multi-level implementation of the decoder. Experimental results on various examples show that our methods produce, on the average, 10~40% reduction of the number of product terms for the PLA implementations and 9.8~34.4% reduction of the number of literal for the multi-level implementations compared to the results of random encoding method.

• Journal of Power Electronics
• /
• 제10권1호
• /
• pp.43-50
• /
• 2010

This paper proposes a new harmonic elimination PWM (HEPWM) scheme for voltage source inverters (VSI) based on the curve fittings of certain polynomials functions. The resulting equations to calculate the switching angle of the HEPWM require only the addition and multiplication processes; therefore any number of harmonics to be eliminated and the fundamental amplitude of the pole switching waveform (NP1) can be controlled on-line. An extensive angle error analysis is carried out to determine the accuracy of the algorithm in comparison to the exact solution. To verify the workability of the technique, an experimental single phase VSI is constructed. The algorithm is implemented on a VSI using a 16-bit microprocessor. The results obtained from the test rig are compared to the theoretical prediction and the results of the MATLAB simulations.

• 한국통신학회논문지
• /
• 제21권5호
• /
• pp.1332-1344
• /
• 1996

This paper presents a pipelined floating point multiplier(FMUL) for superscalar microprocessors that conbines radix-16 recoding scheme based on signed-digit(SD) number system and new rouding and normalization scheme. The new rounding and normalization scheme enable the FMUL to compute sticky bit in parallel with multiple operation and elminate timing delay due to post-normalization. By expoliting SD radix-16 recoding scheme, we can achieves further reduction of silicon area and computation time. The FMUL can execute signle-precision or double-precision floating-point multiply operation through three-stage pipelined datapath and support IEEE standard 754. The algorithm andstructure of the designed multiplier have been successfully verified through Verilog HOL modeling and simulation.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1989년도 추계학술대회 논문집 학회본부
• /
• pp.317-321
• /
• 1989

The fully digitalized inverter has some difficulties in implementation because of the limitation of available memory capacity and computation time. In this paper schemes suitable for a one-chip microprocessor-based realization, which linearize notch angles of selected harmonic elimination (SHE) PWM, are presented. Also the detailed description of the scheme along with the realization is described. The simulation and experiment results show that proposed schemes have the predicted advantages such as good voltage waveforms and a memory-saving.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2001년도 합동 추계학술대회 논문집 정보 및 제어부문
• /
• pp.450-452
• /
• 2001

In this paper, we proposed the automatic postal drop-off system based on the microprocessor board or PC. The weight of the small postal package is transmitted from the electronic scale and user-entered addresses and delivery rate are processed by the controller to calculate the fee. For 24 hour out-door operation and maintenance, non-cash payment methods such as credit card payment is used. The post stamp and receipt are printed by the thermal printer. For the electronic processing of the parcel, serial code is also printed on the stamp and receipts in bar code format. The parcel information obtained by the automatic postal drop-off system is transferred to remote central system by dial-up modem shared by the on site office. The proposed system and its control software are built for prototype model operation and the result met the design requirements. For real time processing, data reception through three serial ports is handled by interrupt routine. The proposed system is expected to be applied for commercial logistics system and pc automation system.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1999년도 하계학술대회 논문집 B
• /
• pp.531-533
• /
• 1999

The main aim of this paper is to investigate the possibility of applying fuzzy control algorithms to a microprocessor-based servomotor controller which requires faster and more accurate response compared with many other industrial processes. In addition, this study deals with the control of the lateral motion of a mobile vehicle. A adaptive fuzzy logic controller(AFLC) is designed and applied to a experimental mobile vehicle in order to achieve control of the lateral motion of the vehicle.