• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.2
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• pp.219-229
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• 2012

In the course of feasibility study the necessity of implementing electrochemical methods as an inline metrology technique to characterize semiconductor nano structures for a Deep Trench Dynamic Random Access Memory (DT-DRAM) (e.g. ultra shallow junctions USJ) was discussed. Hereby, the state of the art semiconductor technology on the advantages and disadvantages of the most recently used analytical techniques for characterization of nano electronic devices are mentioned. Various electrochemical methods, their measure relationship and correlations to physical quantities are explained. The most important issue of this paper is to prove the novel usefulness of the electrochemical micro cell in the semiconductor industry.

• Journal of the Korean Ceramic Society
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• v.39 no.6
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• pp.570-575
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• 2002

The present tendency of electrical and electronics is concentrated on MEMS devices for advantage of miniaturization, intergration, low electric power and low cost. Therefore it is essential that high aspect ratio and high etch rate by HDP technology development, so that silicon deep trench etching reactions was studied by ICP equipment. Deep trench etching of silicon was investigated as function of platen power, etch step time of etch/passivation cycle time and SF$\_$6/:C$_4$F$\_$8/ flow rate. Their effects on etch profile, scallops, etch rate, uniformity and selectivity were also studied.

• Laser Solutions
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• v.18 no.1
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• pp.7-11
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• 2015

In this paper, micro trench structure is fabricated by femtosecond laser for inserting optical reflecting wavelength filter in planar waveguide. The width and depth of the trench is controlled by femtosecond laser machining condition. Also, large scale of single channel with 500um and 1000um on silica plate is fabricated by femtosecond laser, and roughness of the channel surface is polished by $CO_2$ laser for the insertion of the filter. Then, the characteristic of the planar waveguide inserted the filter is verified.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.569-572
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• 2000

This paper presents the optimized fabrication and thermal characteristics of micro-heaters for thermal MEMS applications using a SDB SOI substrate. The micro-heater is based on a thermal measurement principle and contains for thermal isolation regions a 10$\mu\textrm{m}$ thick silicon membrane with oxide-filled trenches in the SOI membrane rim. The micro-heater was fabricated with Pt-RTD(Resistance Thermometer Device)on the same substrate by using MgO as medium layer. The thermal characteristics of the micro-heater with the SOI membrane is 280$^{\circ}C$ at input Power 0.9 W; for the SOI membrane with 10 trenches, it is 580$^{\circ}C$ due to reduction of the external thermal loss. Therefore, the micro-heater with trenches in SOI membrane rim provides a powerful and versatile alternative technology for improving the performance of micro thermal sensors and actuators.

• Journal of the Korean Society of Visualization
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• v.8 no.3
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• pp.22-28
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• 2010

In the present study, we performed the velocity field measurement in a microchannel using a focal length variable micro liquid lens. The liquid lens is used as a beam expander in a micro-PIV system to acquire the scatter image of the seeded particle. A thin film-type micro liquid lens was made of PDMS material and it was attached on top of the 700-micron-wide working fluid supply channel trench. As a result, the focal length and contact angle of the liquid lens changed with variations in applied pressure.

• Journal of Powder Materials
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• v.20 no.2
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• pp.120-124
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• 2013

This study is carried out to develop the new process for the fabrication of ultra-fine electrodes on the flexible substrates using superhydrophobic effect. A facile method was developed to form the ultra-fine trenches on the flexible substrates treated by plasma etching and to print the fine metal electrodes using conductive nano-ink. Various plasma etching conditions were investigated for the hydrophobic surface treatment of flexible polyimide (PI) films. The micro-trench on the hydrophobic PI film fabricated under optimized conditions was obtained by mechanical scratching, which gave the hydrophilic property only to the trench area. Finally, the patterning by selective deposition of ink materials was performed using the conductive silver nano-ink. The interface between the conductive nanoparticles and the flexible substrates were characterized by scanning electron microscope. The increase of the sintering temperature and metal concentration of ink caused the reduction of electrical resistance. The sintering temperature lower than $200^{\circ}C$ resulted in good interfacial bonding between Ag electrode and PI film substrate.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.11a
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• pp.356-357
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• 2005

Chemical mechanical polishing (CMP) allows the planarization of wafers with two or more materials at their surfaces. Especially, polishing pad is considered as one of the most important consumables because of its properties. Subject of this investigation is to apply CMP for planarization of shallow trench isolation structure using microstructure pad. Microstructure pad is designed to have uniform structure on its surface and fabricated by micro-molding technology. And then STI CMP performances such as oxide dishing and nitride corner rounding are evaluated.

• Transactions on Electrical and Electronic Materials
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• v.12 no.4
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• pp.131-134
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• 2011

Back-end-of-line using ultra low-k (ULK; k < 2.5) has been required to reduce resistive capacitance beyond 45 nmtechnologies, because micro-processing units need higher speed and density. There are two strategies to manufacture ULK inter-layer dielectric (ILD) materials using an air-gap (k = 1). The former ULK and calcinations of ILD degrade the mechanical strength and induce a high cost due to the complication of following process, such as chemical mechanical polishing and deposition of the barrier metal. In contrast, the air-gap based low-k ILD with a relatively higher density has been researched on the trench-type with activity, but it has limited application to high density devices due to its high air-gap into the next metal layer. The height of air-gap into the next metal layer was reduced by changing to the via-typed air-gap, up to about 50% compared to that of the trench-typed air-gap. The controllable ULK was easily fabricated using the via-typed air-gap. It is thought that the via-type air-gap made the better design margin like via-patterning in the area with the dense and narrow lines.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.9 no.2
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• pp.155-161
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• 2016

This paper proposes a novel fabrication method for a capacitive type micro-accelerometer with uniform nano-gap using photo-assisted electro-chemical etching. The sensitivity of the accelerometer should be improved while the electrodes between the inertial mass and the sensing comb should be narrowed. In this paper the nano-gap trench structure is fabricated using the photo-assisted electrochemical etching method. The sensor was designed and analysed using ANSYS simulator. The characteristics of the etching were observed according to the dc bias, the light intensity, the composition of the solution, the temperature of the solution, and the pattern pitch variation. The optimum etching conditions were dc bias of 2V, Blue LED of 20mA, 49wt% HF:DMF:D.I.Water=1:20:10, the pattern pitch of $20{\mu}m$. Uniform trench structure with width of 344nm and depth of $11.627{\mu}m$ are formed using the optimum condition.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.3
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• pp.203-207
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• 2008

Chemical mechanical polishing (CMP) allows the planarization of wafers with two or more materials. There are many elements such as slurry, polishing pad, process parameters and conditioning in CMP process. Especially, polishing pad is considered as one of the most important consumables because this affects its performances such as WIWNU(within wafer non-uniformity) and MRR(material removal rate). In polishing pad, grooves and pores on its surface affect distribution of slurry, flow and profile of MRR on wafer. A subject of this investigation is to apply CMP for planarization of shallow trench isolation structure using microstructure(MS) pad. MS pad is designed to have uniform structure on its surface and manufactured by micro-molding technology. And then STI CMP performances such as pattern selectivity, erosion and comer rounding are evaluated.