• Korean Journal of Materials Research
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• v.21 no.3
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• pp.174-179
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• 2011

Ultra-thin aluminum (Al) and tin (Sn) films were grown by dc magnetron sputtering on a glass substrate. The electrical resistance R of films was measured in-situ method during the film growth. Also transmission electron microscopy (TEM) study was carried out to observe the microstructure of the films. In the ultra-thin film study, an exact determination of a coalescence thickness and a continuous film thickness is very important. Therefore, we tried to measure the minimum thickness for continuous film (dmin) by means of a graphical method using a number of different y-values as a function of film thickness. The raw date obtained in this study provides a graph of in-situ resistance of metal film as a function of film thickness. For the Al film, there occurs a maximum value in a graph of in-situ electrical resistance versus film thickness. Using the results in this study, we could define clearly the minimum thickness for continuous film where the position of minimum values in the graph when we put the value of Rd3 to y-axis and the film thickness to x-axis. The measured values for the minimum thickness for continuous film are 21 nm and 16 nm for sputtered Al and Sn films, respectively. The new method for defining the minimum thickness for continuous film in this study can be utilized in a basic data when we design an ultra-thin film for the metallization application in nano-scale devices.

• Journal of the Korean Institute of Telematics and Electronics
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• v.19 no.6
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• pp.91-95
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• 1982

One significant problem which arises during the fabrication of LSI and/or VLSI is how to make a good step coverage for aluminum. One way developed in this study is to flow PSG containing 8.0 wt.% - 8.6 wt.% of phosphorus at 95$0^{\circ}C$ for 30 minutes in steam and to depo3it aluminum of 1 urn thickness at $250^{\circ}C$.

• Korean Journal of Materials Research
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• v.12 no.11
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• pp.889-893
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• 2002

The reactions of $Cu/Ti/SiO_2$ structures at temperatures ranging from 200 to $700^{\circ}C$ have been studied for various Ti thicknesses. The reaction products initially formed, at around $300^{\circ}C$, were a series of Cu-Ti intermetallics ($Cu_3$Ti/CuTi) with the oxygen dissolved in the Ti moving from the compounds into the remaining unreacted Ti. At $500^{\circ}C$, the $Cu_3$Ti was converted into Cu-rich intermetallics, $Cu_4$Ti, which grew at the expense of the CuTi due to the increased oxygen content in the Ti. In addition, the outdiffusion of Ti, to the Cu surface, and the $Ti-SiO_2$ reactions, caused an abrupt increase in the oxygen content in the Ti layer, which placed thermodynamic restraints on further Ti reactions. Furthermore, thinner Ti layers showed a higher increasing rate of oxygen accumulation for the same consumption of Ti, which led to significantly reduced Ti consumption. The $SiO_2$ film under the Ti diffusion barrier was more easily destroyed with increasing Ti thickness.

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.05a
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• pp.41.2-41.2
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• 2011

Recently, scaling down of ULSI (Ultra Large Scale Integration) circuit of CMOS (Complementary Metal Oxide Semiconductor) based electronic devices become much faster speed and smaller size than ever before. However, very narrow interconnect line width causes some drawbacks. For example, deposition of conformal and thin barrier is not easy moreover metallization process needs deposition of diffusion barrier and glue layer. Therefore, there is not enough space for copper filling process. In order to overcome these negative effects, simple process of copper metallization is required. In this research, Cu-V thin alloy film was formed by using RF magnetron sputter deposition system. Cu-V alloy film was deposited on the plane $SiO_2$/Si bi-layer substrate with smooth and uniform surface. Cu-V film thickness was about 50 nm. Cu-V layer was deposited at RT, 100, 150, 200, and $250^{\circ}C$. XRD, AFM, Hall measurement system, and XPS were used to analyze Cu-V thin film. For the barrier formation, Cu-V film was annealed at 200, 300, 400, 500, and $600^{\circ}C$ (1 hour). As a result, V-based thin interlayer between Cu-V film and $SiO_2$ dielectric layer was formed by itself with annealing. Thin interlayer was confirmed by TEM (Transmission Electron Microscope) analysis. Barrier thermal stability was tested with I-V (for measuring leakage current) and XRD analysis after 300, 400, 500, 600, and $700^{\circ}C$ (12 hour) annealing. With this research, over $500^{\circ}C$ annealed barrier has large leakage current. However V-based diffusion barrier annealed at $400^{\circ}C$ has good thermal stability. Thus, thermal stability of vanadium-based thin interlayer as diffusion barrier is good for copper interconnection.

• 한국태양에너지학회:학술대회논문집
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• 2011.11a
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• pp.34-39
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• 2011

Screen printing method is a common way to fabricate the crystalline silicon solar cell with low-cost and high-efficiency. The screen printing metallization use silver paste and aluminum paste for front and rear contact, respectively. Especially the rear contact between aluminum and silicon is important to form the back surface filed (Al-BSF) after firing process. BSF plays an important role to reduces the surface recombination due to $p^+$ doping of back surface. However, Al electrode on back surface leads to bow occurring by differences in coefficient of thermal expansion of the aluminum and silicon. In this paper, we studied the properties of mono crystalline silicon solar cell for rear electrode with aluminum and aluminum-boron in order to characterize bow and BSF of each paste. The 156*156 $m^2$ p-type silicon wafers with $200{\mu}m$ thickness and 0.5-3 ${\Omega}\;cm$ resistivity were used after texturing, diffusion, and antireflection coating. The characteristics of solar cells was obtained by measuring vernier callipers, scanning electron microscope and light current-voltage. Solar cells with aluminum paste on the back surface were achieved with $V_{OC}$ = 0.618V, JSC = 35.49$mA/cm^2$, FF(Fill factor) = 78%, Efficiency = 17.13%.

• Journal of the Microelectronics and Packaging Society
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• v.29 no.2
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• pp.33-41
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• 2022

Recent necessities of research have emerged about soft interconnection technologies for stable electric connections in flexible electronics. Mechanical failure in conventional metal solder interconnection can be solved as soft interconnections based on a small elastic modulus and a thin thickness. To enable stable electric connection while improving mechanical properties, highly conductive materials be thinned or mixed with a material that has a small elastic modulus. Representative soft interconnection technologies such as thin-film metallization, flexible conductive adhesives, and liquid metal interconnections are presented in this paper, and be focused on mechanical/electric properties improving strategies and their applications.

• Journal of the Korean institute of surface engineering
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• v.56 no.2
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• pp.160-168
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• 2023

Recently, investigation on metallization is a key for a stretchable display. Amorphous metal such as Ni and Zr based amorphous metal compounds are introduced for a suitable material with superelastic property under certain stress condition. However, Ni and Zr based amorphous metals have too high resistivity for a display device's interconnectors. In addition, these metals are not suitable for display process chemicals. Therefore, we choose an aluminum based amprhous metal Al-Mo as a interconnector of stretchable display. In this paper, Amorphous Forming Composition Range (AFCR) for Al-Mo alloys are calculated by Midema's model, which is between 0.1 and 0.25 molybdenum, as confirmed by X-ray diffraction (XRD). The elongation tests revealed that amorphous Al-20Mo alloy thin films exhibit superior stretchability compared to pure Al thin films, with significantly less increase in resistivity at a 10% strain. This excellent resistance to hillock formation in the Al20Mo alloy is attributed to the recessed diffusion of aluminum atoms in the amorphous phase, rather than in the crystalline phase, as well as stress distribution and relaxation in the aluminum alloy. Furthermore, according to the AES depth profile analysis, the amorphous Al-Mo alloys are completely compatible with existing etching processes. The alloys exhibit fast etch rates, with a reasonable oxide layer thickness of 10 nm, and there is no diffusion of oxides in the matrix. This compatibility with existing etching processes is an important advantage for the industrial production of stretchable displays.

• Journal of Electrical Engineering and Technology
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• v.4 no.2
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• pp.282-286
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• 2009

This paper presents the design of a patch antenna for GPS portable devices. The antenna is designed to operate at Ll band on an FR4 PCB with a thickness of 1.6mm, a dielectric constant of 3.8 and two metallization layers. The antenna has a dimension of 49mm${\times}$36mm and operates at 1.5754GHz with a return loss of -36dB and a measured bandwidth of 250MHz.

• Laser Solutions
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• v.2 no.3
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• pp.52-61
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• 1999

The laser induced forward transfer(LIFT) technique employs a pulsed laser to transfer parts of a thin metal film from an optically transparent target onto an arbitrary substrate in close proximity to the metal film on the target. In this work, a two-step method, the combination of LIFT process, in which a Au film deposited on the $Al_2$O$_3$ substrate by Nd:YAG laser and subsequent Au electroless metal plating on the by LIFT process generated Au seed, was presented. The influence of laser parameters, wavelength, laser power, film thickness and overlap ratio of pulse tracks, on the shapes of deposit and conductor line after electroless plating is experimentally studied. As a results, the threshold power densities for ablation, deposition and metallization were determined and comparison of threshold value between the wave length 1064nm and the second harmonic generated 532nm. In odor to determine a possible application in the electronic industry, a smallest conduct spot size, line width and isolated line space were generated.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2002.11a
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• pp.49-53
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• 2002

The Sn-Cu eutectic solder bump formation ($140{\mu}{\textrm}{m}$ diameter, $250{\mu}{\textrm}{m}$ pitch) by electroplating was studied for flip chip package fabrication. The effect of current density and plating time on Sn-Cu deposit was investigated. The morphology and composition of plated solder surface was examined by scanning electron microscopy. The plating thickness increased with increasing time. The plating rate increased generally according to current density. After the characteristics of Sn-Cu plating were investigated, Sn-Cu solder bumps were fabricated on optimal condition of 5A/dm$^2$, 2hrs. Ball shear test after reflow was performed to measure adhesion strength between solder bump and UBM (Under Bump Metallization). The shear strength of Sn-Cu bump after reflow was higher than that of before reflow.