• Title/Summary/Keyword: Metal thin-film

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Etch characteristics of TiN thin film adding $Cl_2$ in $BCl_3$/Ar Plasma ($BCl_3$/Ar 플라즈마에서 $Cl_2$ 첨가에 따른 TiN 박막의 식각 특성)

  • Um, Doo-Seung;Kang, Chan-Min;Yang, Xue;Kim, Dong-Pyo;Kim, Chang-Il
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.168-168
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    • 2008
  • Dimension of a transistor has rapidly shrunk to increase the speed of device and to reduce the power consumption. However, it is accompanied with several problems like direct tunneling through the gate dioxide layer and low conductivity characteristic of poly-Si gate in nano-region. To cover these faults, study of new materials is urgently needed. Recently, high dielectric materials like $Al_2O_3$, $ZrO_2$, and $HfO_2$ are being studied for equivalent oxide thickness (EOT). However, poly-Si gate is not compatible with high-k materials for gate-insulator. Poly Si gate with high-k material has some problems such as gate depletion and dopant penetration problems. Therefore, new gate structure or materials that are compatible with high-k materials are also needed. TiN for metal/high-k gate stack is conductive enough to allow a good electrical connection and compatible with high-k materials. According to this trend, the study on dry etching of TiN for metal/high-k gate stack is needed. In this study, the investigations of the TiN etching characteristics were carried out using the inductively coupled $BCl_3$-based plasma system and adding $Cl_2$ gas. Dry etching of the TiN was studied by varying the etching parameters including $BCl_3$/Ar gas mixing ratio, RF power, DC-bias voltage to substrate, and $Cl_2$ gas addition. The plasmas were characterized by optical emission spectroscopy analysis. Scanning electron microscopy was used to investigate the etching profile.

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Characteristics of Ferroelectric-Gate MFISFET Device Behaving to NDRO Configuration (NDRD 방식의 강유전체-게이트 MFSFET소자의 특성)

  • 이국표;강성준;윤영섭
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.1
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    • pp.1-10
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    • 2003
  • Device characteristics of the Metal-Ferroclecric-Semiconductor FET(MFSFET) are simulated in this study. The field-dependent polarization model and the square-law FET model are employed in our simulation. C-V$_{G}$ curves generated from our MFSFET simulation exhibit the accumulation, the depletion and the inversion regions clearly. The capacitance, the subthreshold and the drain current characteristics as a function of gate bias exhibit the memory windows are 1 and 2 V, when the coercive voltages of ferroelectric are 0.5 and 1 V respectively. I$_{D}$-V$_{D}$ curves are composed of the triode and the saturation regions. The difference of saturation drain currents of the MFSFET device at the dual threshold voltages in I$_{D}$-V$_{D}$ curve is 1.5, 2.7, 4.0, and 5.7 ㎃, when the gate biases are 0, 0.1, 0.2 and 0.3V respectively. As the drain current is demonstrated after time delay, PLZT(10/30/70) thin film shows excellent reliability as well as the decrease of saturation current is about 18 % after 10 years. Our simulation model is expected to be very useful in the estimation of the behaviour of MFSFET devices.T devices.

Recrystallized poly-Si TFTs on metal substrate (금속기판에서 재결정화된 규소 박막 트랜지스터)

  • 이준신
    • Electrical & Electronic Materials
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    • v.9 no.1
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    • pp.30-37
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    • 1996
  • Previously, crystallization of a-Si:H films on glass substrates were limited to anneal temperature below 600.deg. C, over 10 hours to avoid glass shrinkage. Our study indicates that the crystallization is strongly influenced by anneal temperature and weakly affected by anneal duration time. Because of the high temperature process and nonconducting substrate requirements for poly-Si TFTs, the employed substrates were limited to quartz, sapphire, and oxidized Si wafer. We report on poly-Si TFT's using high temperature anneal on a Si:H/Mo structures. The metal Mo substrate was stable enough to allow 1000.deg. C anneal. A novel TFT fabrication was achieved by using part of the Mo substrate as drain and source ohmic contact electrode. The as-grown a-Si:H TFT was compared to anneal treated poly-Si TFT'S. Defect induced trap states of TFT's were examined using the thermally stimulated current (TSC) method. In some case, the poly-Si grain boundaries were passivated by hydrogen. A-SI:H and poly-Si TFT characteristics were investigated using an inverted staggered type TFT. The poly -Si films were achieved by various anneal techniques; isothermal, RTA, and excimer laser anneal. The TFT on as grown a-Si:H exhibited a low field effect mobility, transconductance, and high gate threshold voltage. Some films were annealed at temperatures from 200 to >$1000^{\circ}C$ The TFT on poly-Si showed an improved $I_on$$I_off$ ratio of $10_6$, reduced gate threshold voltage, and increased field effect mobility by three orders. Inverter operation was examined to verify logic circuit application using the poly Si TFTs.

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Fabrication of Coated Conductor by Continuous PVD Methods (연속 공정 PVD 방법에 의한 Coated Conductor 제조)

  • Ko, Rock-Kil;Chung, Jun-Ki;Kim, Ho-Sup;Ha, Hong-Soo;Shi, Dongqi;Song, Kyu-Jeong;Park, Chan;Yoo, Sang-Im;Moon, Seung-Hyun;Kim, Young-Cheol
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.17 no.11
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    • pp.1241-1245
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    • 2004
  • Continuous physical vapor deposition (PVD) method is one of many processes to fabricate long length coated conductor which is required for successful large-scale application of superconducting power devices. Three film deposition systems (pulsed laser deposition, sputtering, and evaporation) equipped with reel-to-reel(R2R) metal tape moving apparatus were installed and used to deposit multi-layer oxide thin films. Both RABiTS and IBAD texture templates are used. IBAD template consists of CeO$_2$(PLD)/YSZ(IBAD) on stainless steel(SS) metal tape, and RABiTS template has the structure of CeO$_2$/YSZ/Y$_2$O$_3$ which was continuously deposited on Ni-alloy tape using R$_2$R evaporation and DC reactive sputtering in a deposition system designed to do both processes. 0.4 m-long coated conductor with Ic(77 K) of 34 A/cm was fabricated using RABiTS template. 0.5 m and 1.1 m-long coated conductor with Ic(77 K) of 41 A/cm and 26 A/cm were fabricated using IBAD template.

Adaptive Learning Circuit For Applying Neural Network (뉴럴 네트워크의 적용을 위한 적응형 학습회로)

  • Lee, Kook-Pyo;Pyo, Chang-Soo;Koh, Si-Young
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.3
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    • pp.534-540
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    • 2008
  • The adaptive learning circuit is designed on the basis of modeling of MFSFET (Metal-Ferroelectric-Semiconductor FET) and the numerical results is analyzed. The output frequency of the adaptive learning circuit is inversely proportional to the source-drain resistance of MFSFET and the capacitance of the circuit. The saturated drain current with input pulse number is analogous to the ferroelectric polarization reversal. It indicates that the ferroelectric polarization plays an important role in the drain current control of MFSFET. The output frequency modulation of the adaptive learning circuit is investigated by analyzing the source-drain resistance of MFSFET as functions of input pulse numbers in the adaptive learning circuit and the dimensionality factor of the ferroelectric thin film. From the results, adaptive learning characteristics which means a gradual frequency change of output pulse with the progress of input pulse, are confirmed. Consequently it is shown that our circuit can be used effectively in the neuron synapses of neural networks.

Characteristics by deposition and heat treatment of Cr and Al thin film on stainless steel (금속 기판위에 Cr과 Al 증착 및 열처리 융합 기술에 의한 표면 형상 변화)

  • Kim, Kyoung-Bo;Lee, Jongpil;Kim, Moojin
    • Journal of Convergence for Information Technology
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    • v.11 no.3
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    • pp.167-173
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    • 2021
  • There is an increasing interest in manufacturing various electronic devices on a bendable substrate. In this paper, we observed a surface morphology by annealing for 20 minutes at temperatures of 150 ℃, 350 ℃, and 550 ℃, respectively, with samples coated by chromium and aluminum. Data on surfaces are investigated using high-resolution SEM and AFM that can measure roughness up to nm. There is no difference from the sample without heat treatment up to 350 ℃, but the change of crystal grains can be observed at 550 ℃. In the future, for application to the flexible optoelectronic field, additional characteristics such as electrical conductivity and reflectivity will be analyzed and optical devices will be manufactured. In conclusion, we will explore the possibility of applying metal materials to flexible electronic devices.

Comparison of Characteristics of Electrodeposited Lithium Electrodes Under Various Electroplating Conditions (다양한 전착조건에서 제작된 리튬 전극의 특성 연구)

  • Lim, Rana;Lee, Minhee;Kim, Jeom-Soo
    • Journal of the Korean Electrochemical Society
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    • v.22 no.3
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    • pp.128-137
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    • 2019
  • A lithium is the lightest metal on the earth. It has some attractive characteristics as a negative electrode material such as a low reduction potential (-3.04 V vs. SHE) and a high theoretical capacity ($3,860mAh\;g^{-1}$). Therefore, it has been studied as a next generation anode material for high energy lithium batteries. The thin lithium electrode is required to maximize the efficiency and energy density of the battery, but the physical roll-press method has a limitation in manufacturing thin lithium. In this study, thin lithium electrode was fabricated by electrodeposition under various conditions such as compositions of electrolytes and the current density. Deposited lithium showed strong relationship between process condition and its characteristics. The concentration of electrolyte affects to the shape of deposited lithium particle. As the concentration increases, the shape of particle changes from a sharp edged long one to a rounded lump. The former shape is favorable for suppressing dendrite formation and the elec-trode shows good stripping efficiency of 92.68% (3M LiFSI in DME, $0.4mA\;cm^{-2}$). The shape of deposited particle also affected by the applied current density. When the amount of current applied gets larger the shape changes to the sharp edged long one like the case of the low concentration electrolyte. The combination of salts and solvents, 1.5M LiFSI + 1.5M LiTFSI in DME : DOL [1 : 1 vol%] (Du-Co), was applied to the electrolyte for the lithium deposition. The lithium electrode obtained from this electrolyte composition shows the best stripping efficiency (97.26%) and the stable reversibility. This is presumed to be due to the stability of the surface film induced by the Li-F component and the DOL effect of providing film flexibility.

Dose Evaluation at The Build Up Region Using by Wedge Filter (쐐기필터 사용에 따른 선량증가 영역에서 선량평가)

  • Kim, Yon-Lae;Moon, Seong-Kong;Suh, Tae-Suk;Chung, Jin-Beom;Kim, Jin-Young;Lee, Jeong-Woo
    • Journal of radiological science and technology
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    • v.37 no.4
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    • pp.341-348
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    • 2014
  • Wedge filter could use to increase the dose distribution at the hot dose regions. We evaluated dose discrepancy at surface and build region in the infield and outfield that Metal Wedge (MW) and Enhance Dynamic Wedge (EDW) were interact with photon. In this paper, we used Gafchromic EBT3 film that had excellent spatial resolution, composed the water equivalent materials and changed the optical density without development. The set up conditions of linear accelerator were fixed 6 MV photon, 100 cm SSD, $10{\times}10cm^2$ field size and were irradiated 400 cGy at Dmax. The dose distribution and absorbed dose were evaluated when we compared the open field with $15^{\circ}$, $30^{\circ}$, $45^{\circ}$ metal wedge and enhanced dynamic wedge. A $15^{\circ}$ metal wedge could increase the surface and build up region dose than using a $15^{\circ}$ enhanced dynamic wedge. A $30^{\circ}$ metal wedge could decrease the surface and build up region dose than using a $30^{\circ}$ enhanced dynamic wedge. A $45^{\circ}$ metal wedge could decrease by large deviation the surface and build up region dose than using a $15^{\circ}$ enhanced dynamic wedge. The dose of penumbra region at outfield were increased on the thick side but were decreased on the thin side. It could be decrease the surface dose and build up region dose, if the metal wedge filters were properly used to make a good dose distribution and not closed the distance of surface.

Study on the fabrication of a polycrystalline silicon (pc-Si) seed layer for the pc-Si lamelliform solar cell (다결정 실리콘 박형 태양전지를 위한 다결정 실리콘 씨앗층 제조 연구)

  • Jeong, Hyejeong;Oh, Kwang H.;Lee, Jong Ho;Boo, Seongjae
    • 한국신재생에너지학회:학술대회논문집
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    • 2010.06a
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    • pp.75.2-75.2
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    • 2010
  • We studied the fabrication of polycrystalline silicon (pc-Si) films as seed layers for application of pc-Si thin film solar cells, in which amorphous silicon (a-Si) films in a structure of glass/Al/$Al_2O_3$/a-Si are crystallized by the aluminum-induced layer exchange (ALILE) process. The properties of pc-Si films formed by the ALILE process are strongly determined by the oxide layer as well as the various process parameters like annealing temperature, time, etc. In this study, the effects of the oxide film thickness on the crystallization of a-Si in the ALILE process, where the thickness of $Al_2O_3$ layer was varied from 4 to 50 nm. For preparation of the experimental film structure, aluminum (~300 nm thickness) and a-Si (~300 nm thickness) layers were deposited using DC sputtering and PECVD method, respectively, and $Al_2O_3$ layer with the various thicknesses by RF sputtering. The crystallization of a-Si was then carried out by the thermal annealing process using a furnace with the in-situ microscope. The characteristics of the produced pc-Si films were analyzed by optical microscope (OM), scanning electron microscope (SEM), Raman spectrometer, and X-ray diffractometer (XRD). As results, the crystallinity was exponentially decayed with the increase of $Al_2O_3$ thickness and the grain size showed the similar tendency. The maximum pc-Si grain size fabricated by ALILE process was about $45{\mu}m$ at the $Al_2O_3$ layer thickness of 4 nm. The preferential crystal orientation was <111> and more dominant with the thinner $Al_2O_3$ layer. In summary, we obtained a pc-Si film not only with ${\sim}45{\mu}m$ grain size but also with the crystallinity of about 75% at 4 nm $Al_2O_3$ layer thickness by ALILE process with the structure of a glass/Al/$Al_2O_3$/a-Si.

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Fabrication and Evaluation of a VHF Focusing Ultrasonic Transducer Made of PVDF Piezoelectric Film (PVDF 압전막을 이용한 초고주파 집속 초음파 트랜스듀서의 제작 및 특성 평가)

  • Yoon, Ju-Ho;Oh, Jung-Hwan;Kim, Jung-Soon;Kim, Moo-Joon;Ha, Kang-Lyeol
    • The Journal of the Acoustical Society of Korea
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    • v.30 no.4
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    • pp.215-222
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    • 2011
  • In order to obtain high resolution images, a focusing ultrasonic transducer operated in very high frequency (VHF) range was fabricated and its characteristics were evaluated. A 9-${\mu}m$ thick PVDF film with only one metalized surface for electric ground was adhered to a CCP (Copper-clad polyimide) film by using epoxy. It was pressed by a metal ball to form a concave surface and its rear side was filled with the epoxy. The radius of curvature and the f-number of the fabricated transducer are 7.5 mm and 1.7, respectively. The pulse-echo measurement results from a target located at the focal point showed that the frequency bandwidth was 35.0 MHz and the insertion loss near the peak frequency of approximately 40 MHz was about 60 dB. Those values agreed well with the simulation results by the KLM equivalent circuit analysis including the effect of the epoxy bonding layer. When the image of thin copper lines by the 35 MHz transducer of the UBM (Ultrasonic Backscattering Microscope) system was compared with the image by the transducer fabricated in this study, the fabricated transducer was observed that the axial resolution was improved although the lateral resolution was degraded.