• Resources Recycling
• /
• v.26 no.4
• /
• pp.19-25
• /
• 2017

The ways of producing metal silicon include a carbon reduction method, a plasma reduction method, and a thermite reaction method. The carbon reduction process produces metal silicon by metallurgical refining. The carbon reduction method is produced by adding a raw material mixed with quartz and coke to an electric arc furnace which is for carbon reduction. The cost of high energy costs and environmental protection facilities is an issue when producing metal silicon using electric arc furnaces. For this reason, there is no metal silicon production facility in Korea yet. Therefore, the optimal manufacturing conditions by the carbon reduction method are being studied through the experimental facilities by the companies and research institutes. The present study investigated the change of metal silicon purity according to the purity of silicon when extracting metal silicon using the thermit reaction, which has a relatively lower manufacturing cost than the carbon reduction method.

• Journal of Integrative Natural Science
• /
• v.6 no.3
• /
• pp.170-175
• /
• 2013

Silicon nanowires were detached and obtained from silicon nanowire arrays on silicon substrate using a ultrasono-method. Silicon nanowire arrays on silicon substrate were prepared with an electroless metal assisted etching of p-type silicon. The etching solution was an aqueous HF solution containing silver nitrate. SEM observation shows that well-aligned nanowire arrays perpendicular to the surface of the silicon substrate were produced. After sonication of silicon nanowire array, an individual silicon nanowire was confirmed by FESEM. Optical characteristics of SiNWs were measured by FT-IR spectroscopy. The surface of SiNWs are terminated with hydrogen.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.26 no.4
• /
• pp.88-97
• /
• 1989

This paper proposes an efficient switch-box router which consists of two parts ; greedy poly-jog router and via minimizer. The greedy switch-box router of Luk, routes not only metal wires at horizontal tracks and poly-silicon wires at vertical tracks but also poly-siliocon wires ar horizontal tracks if necessary. The via minimizer reduces the number of vias and the wire length by fipping of each corner, parallel moving of wire segment, transformation metal into poly-silicon, and transformation poly-silicon into metal. The result is generated through the column-wise scan across the routing region. The expected time complexity is O(M(Nnet)). Where M, N, and Nnet are respectively the number of columns, rows, and nets in the routing region.

• Journal of Integrative Natural Science
• /
• v.5 no.4
• /
• pp.211-215
• /
• 2012

Single-crystalline silicon nanowire arrays (SiNWAs) using electroless metal-assisted etchings of p-type silicon were successfully fabricated. Ag nanoparticle deposition on silicon wafers in HF solution acted as a localized micro-electrochemical redox reaction process in which both anodic and cathodic process took place simultaneously at the silicon surface to give SiNWAs. The growth effect of SiNWs was investigated by changing of etching times. The morphologies of SiNWAs were obtained by SEM observation. Well-aligned nanowire arrays perpendicular to the surface of the silicon substrate were produced. Optical characteristics of SiNWs were measured by FT-IR spectroscopy and indicated that the surface of SiNWs are terminated with hydrogen. The thicknesses and lengths of SiNWs are typically 150-250 nm and 2 to 5 microns, respectively.

• 한국태양에너지학회:학술대회논문집
• /
• 2009.04a
• /
• pp.235-240
• /
• 2009

Crystlline silicon solar cells markets are increasing at rapid pace. now, crystlline silicon solar cells markets screen-printing solar cell is occupying. screen-printing solar cells manufacturing process are very quick, there is a strong point which is a low cost. but silicon and metal contact, uses Ag & Al pates. because of, high contact resistance, high series resistance and sintering inside process the electric conductivity decreases with 1/3. and In pastes ingredients uses Ag where $80{\sim}90%$ is metal of high cost. because of low cost solar cells descriptions is difficult. therefore BCSC(Buried Contact Solar Cell) is developed. and uses light-induced plating, ln-line galvanization developed equipments. Ni/Cu matel contact solar cells researches. in Germany Fraunhofer ISE. In order to manufacture high-efficiency solar cells, metal selections are important. metal materials get in metal resistance does small, to be electric conductivity does highly. efficiency must raise an increase with rise of the curve factor where the contact resistance of the silicon substrate and is caused by few with decrement of series resistance. Ni metal materials the price is cheap, Ti comes similar resistance. Cu and Ag has the electric conductivity which is similar. and Cu price is cheap. In this paper, Ni/Cu/Ag metal contact cell with screen printing manufactured, silicon metal contact comparison and analysis.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2006.11a
• /
• pp.109-109
• /
• 2006

Screen printing (SP) metal contact is typically applied to the solar cells for mass production. However, SP metal contact has low aspect ratio, low accuracy, hard control of the substrate penetration and unclean process. On the other hand, photo lithograpy (PL) metal contact can reduce defects by metal contact. In this investigation, PL metal contact was obtained the multi-layer structure of Ti/Pd/Ag by e-beam process. We applied SP metal contact and PL metal contact to single crystalline silicon solar cells, and demonstrated the difference of conversion efficiency. Because PL metal contact silicon solar cell has Jsc (short circuit current density) better than silicon solar cell applied SP metal contact.

• Transactions on Electrical and Electronic Materials
• /
• v.16 no.6
• /
• pp.312-316
• /
• 2015

Through silicon via (TSV) technology holds the promise of chip-to-chip or chip-to-package interconnections for higher performance with reduced signal delay and power consumption. It includes high aspect ratio silicon etching, insulation liner deposition, and seamless metal filling. The desired etch profile should be straightforward, but high aspect ratio silicon etching is still a challenge. In this paper, we investigate the use of etch hard mask for finer TSVs etching to have clear definition of etched via pattern. Conventionally employed photoresist methods were initially evaluated as reference processes, and oxide and metal hard mask were investigated. We admit that pure metal mask is rarely employed in industry, but the etch result of metal mask support why hard mask are more realistic for finer TSV etching than conventional photoresist and oxide mask.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.16 no.4
• /
• pp.470-480
• /
• 2016

The reversal of a silicon chip to find out its security structure is common and possible at the present time. Thanks to reversing, it is possible to use a probing attack to obtain useful information such as personal information or a cryptographic key. For this reason, security-related blocks such as DES (Data Encryption Standard), AES (Advanced Encryption Standard), and RSA (Rivest Shamir Adleman) engines should be located in the lower layer of the chip to guard against a probing attack; in this regard, the addition of a silicon-surface-protection layer onto the chip surface is a crucial protective measure. But, for manufacturers, the implementation of an additional silicon layer is burdensome, because the addition of just one layer to a chip significantly increases the overall production cost; furthermore, the chip size is increased due to the bulk of the secure logic part and routing area of the silicon protection layer. To resolve this issue, this paper proposes a practical silicon-surface-protection method using a metal layer that increases the security level of the chip while minimizing its size and cost. The proposed method uses a shift register for the alternation and variation of the metal-layer data, and the inter-connection area is removed to minimize the size and cost of the chip in a more extensive manner than related methods.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2012.08a
• /
• pp.86-86
• /
• 2012

The new approaches for silicon solar cell of new concept have been actively conducted. Especially, solar cells with wire array structured radial p-n junctions has attracted considerable attention due to the unique advantages of orthogonalizing the direction of light absorption and charge separation while allowing for improved light scattering and trapping. One-dimenstional semiconductor nano/micro structures should be fabricated for radial p-n junction solar cell. Most of silicon wire and/or pillar arrays have been fabricated by vapour-liquid-solid (VLS) growth because of its simple and cheap process. In the case of the VLS method has some weak points, that is, the incorporation of heavy metal catalysts into the growing silicon wire, the high temperature procedure. We have tried new approaches; one is electrochemical etching, the other is noble metal catalytic etching method to overcome those problems. In this talk, the silicon pillar formation will be characterized by investigating the parameters of the electrochemical etching process such as HF concentration ratio of electrolyte, current density, back contact material, temperature of the solution, and large pre-pattern size and pitch. In the noble metal catalytic etching processes, the effect of solution composition and thickness of metal catalyst on the etching rate and morphologies of silicon was investigated. Finally, radial p-n junction wire arrays were fabricated by spin on doping (phosphor), starting from chemical etched p-Si wire arrays. In/Ga eutectic metal was used for contact metal. The energy conversion efficiency of radial p-n junction solar cell is discussed.

• Journal of Medicine and Life Science
• /
• v.20 no.2
• /
• pp.83-88
• /
• 2023

Metal artifacts cause inaccuracies in target delineation, radiation treatment planning, and delivery when computed tomography images of a radiotherapy patient implanted with a high-density material in the body are acquired. In this study, we investigated the possibility of obtaining improved images in clinical trials through metal artifact reduction using silicon impression materials without the need for a specific metal artifact reduction algorithm. A silicon impression material exhibiting a constant Hounsfield unit (HU) value according to the mixing ratio of the catalysts and bases was selected. The material did not exhibit any change in weight or shape over time. For both the instances of inserting the metal material and applying the silicon impression material, the HU value and dose were compared with homogeneous cases filled with water-equivalent materials. When the silicon impression material was applied to the region where the high-density material was located, the HU value was within 5% and the dose was within 3% compared with those of the homogeneous cases. In this study, the silicon impression materials reduced metal artifacts. However, because the composition, shape, size, and location of high-density materials differ, further studies are required to consider these factors in clinical applications.