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Randy Torrance and Dick James. The State-of-the-Art in IC Reverse Engineering. In CHES'2009, http://www.iacr.org/archive/ches2009/57470361/57470361.pdf
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2 |
Sheshadri, Vijay Benakanakere. UPSET TRENDS IN FLIP-FLOP DESIGNS AT DEEP. Diss. Vanderbilt University, 2010. http://etd.library.vanderbilt.edu/available/etd-09062010-120803/unrestricted/benakanakeresheshadri.pdf
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BAI, Peng, et al. A 65nm logic technology featuring 35nm gate lengths, enhanced channel strain, 8 Cu interconnect layers, low-k ILD and SRAM cell. In: Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International. IEEE, 2004. p. 657-660.
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4 |
Wolfgang Rankl and Wolfgang Effing, SmartCard Handbook 3rd Edition, ISBN: 0-470-85668-8
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5 |
Christopher Tarnovsky. ST19XL18P - K5F0A Teardown, May, 2012 http://www.flylogic.net/blog/?m=201205
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6 |
Sebastien Briais, Stephane Caron, Jean-Michel Cioranesco, Jean-Luc Danger, Sylvain Guilley, Jacques Henri Jourdan, Arthur Milchior, David Naccache, and Thibault Porteboeuf. 3D Hardware Canaries. In CHES, Lecture Notes in Computer Science. Springer, September 9-12 2012. Leuven, Belgium. Full version in ePrint Archive, Report 2012/324 (http://eprint.iacr.org/2012/324/).
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7 |
Christopher Tarnovsky. Black Hat DC 2010: Hacking the Smartcard Chip. Online video: http://www.youtube.com/watch?v=Qk73ye2_g4o
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8 |
Sebastien Briais, Jean-Michel Cioranesco, Jean-Luc Danger, Sylvain Guilley, David Naccache, Thibault Porteboeuf, "Random Active Shield" 2012 Workshop on Fault Diagnosis and Tolerance in Cryptography(FDTC), 09 September 2012, ISBN: 978-1-4673-2900-2
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9 |
Christopher Tarnovsky. Infineon / ST Mesh Comparison, February 14th 2010. http://www.flylogic.net/blog/?p=86
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10 |
Peter Laackmann and Hans Taddiken. Apparatus for protecting an integrated circuit formed in a substrate and method for protecting the circuit against reverse engineering, February 19 2003. United States Patent number 6,798,234
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11 |
Oliver Kommerling, Markus Kuhn, "Design Principles for Tamper-Resistant Smartcard Processors". http://static.usenix.org/events/smartcard99/full_papers/kommerling/kommerling_html/
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12 |
Common Criteria for Information Technology Security Evaluation (ISO/IEC 15408). Website: http://www.commoncriteriaportal.org/.
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13 |
Neil H.E. Weste and David Harris. CMOS VLSI Design: A Circuits and Systems Perspective. Addison Wesley, 2004. 3rd edition (May 11, 2004)..
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