• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.358-361
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• 2002

Self-aligned MOSFETS using a polysilicon gate are widely fabricated in silicon technology. The polysilicon layer acts as a mask for the source and drain implants and does as gate electrode in the final product. However, the usage of polysilicon gate as a self-aligned mask is restricted in fabricating SiC MOSFETS since the following processes such as dopant activation, ohmic contacts are done at the very high temperature to attack the stability of the polysilicon layer. A metal instead of polysilicon can be used as a gate material and even can be used for ohmic contact to source region of SiC MOSFETS, which may reduce the number of the fabrication processes. Co-formation process of metal-source/drain ohmic contact and gate has been examined in the 4H-SiC based vertical power MOSFET At low bias region (<20V), increment of leakage current after RTA was detected. However, the amount of leakage current increment was less than a few tens of ph. The interface trap densities calculated from high-low frequency C-V curves do not show any difference between w/ RTA and w/o RTA. From the C-V characteristic curves, equivalent oxide thickness was calculated. The calculated thickness was 55 and 62nm for w/o RTA and w/ RTA, respectively. During the annealing, oxidation and silicidation of Ni can be occurred. Even though refractory nature of Ni, 950$^{\circ}C$ is high enough to oxidize it. Ni reacts with silicon and oxygen from SiO$_2$ 1ayer and form Ni-silicide and Ni-oxide, respectively. These extra layers result in the change of capacitance of whole oxide layer and the leakage current

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.174-174
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• 2000

A strong antiferromagnetic coupling in Fe/Si multilayered films (MLF) had been recently discovered and much consideration has been given to whether the coupling in the Fe/Si MLF system has the same origin as the metal/metal MLF. Nevertheless, the nature of the interfacial ron silicide is still controversial. On one hand, a metal/ semiconductor structure was suggested with a narrow band-gap semiconducting $\varepsilon$-FeSi spacer that mediates the coupling. However, some features show that the nature of coupling can be well understood in terms of the conventional metal/metal multilayered system. It is well known that both magneto-optical (MO) and optical properties of a metal depend strongly on their electronic structure that is also correlated with the atomic and chemical ordering. In this study, the nature of the interfacial regions is the Fe/Si multilayers has been investigated by the experimental and computer-simulated MO and optical spectroscopies. The Fe/Si MLF were prepared by rf-sputtering onto glass substrates at room temperature with the number of repetition N=50. The thickness of Fe sublayer was fixed at 3.0nm while the Si sublayer thickness was varied from 1.0 to 2.0 nm. The topmost layer of all the Fe/Si MLF is Fe. In order to carry out the computer simulations, the information on the MO and optical parameters of the materials that may constitute a real multilayered structure should be known in advance. For this purpose, we also prepared Fe, Si, FeSi2 and FeSi samples. The structural characterization of Fe/Si MLF was performed by low- and high -angle x-ray diffraction with a Cu-K$\alpha$ radiation and by transmission electron microscopy. A bulk $\varepsilon$-FeSi was also investigated. The MO and optical properties were measured at room temperature in the 1.0-4.7 eV energy range. The theoretical simulations of MO and optical properties for the Fe/Si MLF were performed by solving exactly a multireflection problem using the scattering matrix approach assuming various stoichiometries of a nonmagnetic spacer separating the antiferromagnetically coupled Fe layers. The simulated spectra of a model structure of FeSi2 or $\varepsilon$-FeSi as the spacer turned out to fail in explaining the experimental spectra of the Fe/Si MLF in both intensity and shape. Thus, the decisive disagreement between experimental and simulated MO and optical properties ruled out the hypothesis of FeSi2 and $\varepsilon$-FeSi as the nonmagnetic spacer. By supposing the spontaneous formation of a metallic ζ-FeSi, a reasonable agreement between experimental and simulated MO and optical spectra was obtained.

• Journal of Information Display
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• v.2 no.3
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• pp.54-59
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• 2001

The role of $NH_3$ for vertical alignment of CNTs was investigated. The direct cause of the alignment was a dense distribution of catalytic metal particles, but which was kept catalytically active during the growth process by $NH_3$. This allows a dense nucleation of the CNTs, and consequently, assists vertical alignment through entanglement and mechanical leaning among the tubes. The CNTs grow in a base growth mode. Several evidences were presented including a direct cross-sectional TEM observation. Since Ni is consumed both by silicide reaction and by capture in the growing tube, the growth stops when Ni is completely depleted. This occurs faster for smaller particles, and thus a longer growth results in thin bottom with poor adhesion.

• Journal of the Korean Vacuum Society
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• v.12 no.S1
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• pp.7-9
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• 2003

Solid-state reactions in Ni/Si multilayered films (MLF) with an overall stoichiometry of $Ni_2Si$, NiSi and $NiSi_2$, induced by ion-beam mixing (IBM) and thermal annealing, were studied by using spectroscopic ellipsometry and magneto-optical spectroscopy as well as x-ray diffraction (XRD). The mixing was performed with Ar+ ions of an energy of 80 keV and a dose of $1.5 x\times10^{16}$ $Ar^+$/$\textrm{cm}^2$. It was shown that the IBM induces structural changes in the Ni/Si MLF, which cannot be detected by XRD but are confidently recognized by the optical method. A thermal annealing at 673 K of the Ni/Si MLF with an overall stoichiometry of NiSi and $NiSi_2$ causes formation of the first η -NiSi phase. The first trace for $NiSi_2$ phase on the background of NiSi one was detected by XRD after an annealing at 1073 K while, according to the optical results, $NiSi_2$ turns out be the dominant phase for the annealed Ni/Si MLF with an overall stoichiometry of $NiSi_2$.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.1
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• pp.10-15
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• 2006

Various sizes of erbium/platinum silicided n/p-type Schottky barrier metal-oxide-semiconductor field effect transistors (SB-MOSFETs) are manufactured from $20{\mu}m$ to 10nm. The manufactured SB-MOSFETs show excellent DIBL and subthreshold swing characteristics due to the existence of Schottky barrier between source and channel. It is found that the minimization of trap density between silicide and silicon interface and the reduction of the underlap resistance are the key factors for the improvement of short channel characteristics. The manufactured 10 nm n-type SBMOSFET showed $550{\mu}A/um$ saturation current at $V_{GS}-V_T$ = $V_{DS}$ = 2V condition ($T_{ox}$ = 5nm) with excellent short channel characteristics, which is the highest current level compared with reported data.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.133-133
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• 2011

최근 나노입자를 이용한 비휘발성 메모리 소자의 제작에 대한 연구가 진행되고 있다. 특히, 실리사이드 계열의 나노입자를 적용한 소자는 일함수가 크지만 실리콘 내의확산 문제를 가지고 있는 금속 나노입자와 달리 현 실리콘 기반의 반도체 공정 적용이 용이한 잇 점을 가지고 있다. 따라서 본 연구에서는 실리사이드 계열의 화합물 중에서 4.63 eV인 Vanadium Silicide ($V_3$Si) 박막을 열처리 과정을 통하여 수 nm 크기의 나노입자로 제작하였다. 소자의 제작은 p-Si기판에 5 nm 두께의 $SiO_2$ 터널층을 dry oxidation 방법으로 성장시킨 후 $V_3$Si 금속박막을 RF magnetron sputtering system을 이용하여 3~5 nm 두께로 tunnel barrier위에 증착시켰다. Rapid thermal annealing법으로 질소 분위기에서 $1000^{\circ}C$의 온도로 30초 동안 열처리하여 $V_3$Si 나노 입자를 형성 하였으며. 20 nm 두께의 $SiO_2$ 컨트롤 산화막층을 ultra-high vacuum magnetron sputtering을 이용하여 증착하였다. 마지막으로 thermal evaporation system을 통하여 Al 전극을 직경 200, 두께 200nm로 증착하였다. 제작된 구조는 metal-oxide-semiconductor구조를 가지는 나노 부유 게이트 커패시터 이며, 제작된 시편은 transmission electron microscopy을 이용하여 $V_3$Si 나노입자의 크기와 균일성을 확인했다. 소자의 전기적인 측정은 E4980A capacitor parameter analyzer와 Agilent 81104A apulse pattern generator system을 이용한 전기용량-전압 측정을 통해 전하저장 효과를 분석하였다.

• 한국태양에너지학회:학술대회논문집
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• 2009.04a
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• pp.214-219
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• 2009

In high-efficiency crystalline silicon solar cells, If high-efficiency solar cells are to be commercialized. It is need to develop superior contact formation method and material that can be inexpensive and simple without degradation of the solar cells ability. For reason of plated metallic contact is not only high metallic purity but also inexpensive manufacture. It is available to apply mass production. Especially, Nickel, Copper and Silver are applied widely in various electronic manufactures as easily formation is available by plating. The metallic contact system of silicon solar cell must have several properties, such as low contact resistance, easy application and good adhesion. Ni is shown to be a suitable barrier to Cu diffusion as well as desirable contact metal to silicon. Nickel monosilicide(NiSi) has been suggested as a suitable silicide due to its lower resistivity, lower sintering temperature and lower layer stress than $TiSi_2$. Copper and Silver can be plated by electro & light-induced plating method. Light-induced plating makes use the photovoltaic effect of solar cell to deposite the metal on the front contact. The cell is immersed into the electrolytic plating bath and irradiated at the front side by light source, which leads to a current density in the front side grid. Electroless plated Ni/ Electro&light-induced plated Cu/ Light-induced plated Ag contact solar cells result in an energy conversion efficiency of 14.68 % on $0.2{\sim}0.6{\Omega}{\cdot}cm,\;20{\times}20mm^2$, CZ(Czochralski) wafer.

• Journal of the Microelectronics and Packaging Society
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• v.11 no.2 s.31
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• pp.29-35
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• 2004

Hafnium-oxide gate dielectric films deposited by a metal organic chemical vapor deposition technique on a $N_2-plasma$ treated SiNx and a hydrogen-terminated Si substrate have been investigated. In the case of $HfO_2$ film deposited on a hydrogen-terminated Si substrate, suppressed crystallization with effective carbon impurity reduction was obtained at $450^{\circ}C$. X-ray photoelectron spectroscopy indicated that the interface layer was Hf-silicate rather than phase separated Hf-silicide and silicon oxide structure. Capacitance-voltage measurements show equivalent oxide thickness of about 2.6nm for a 5.0 nm $HfO_2/Si$ single layer capacitor and of about 2.7 nm for a 5.7 nm $HfO_2/SiNx/Si$ stack capacitor. TEM shows that the interface of the stack capacitor is stable up to $900^{\circ}C$ for 30 sec.

• Journal of IKEEE
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• v.25 no.3
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• pp.467-472
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• 2021

Stable operation of semiconductor devices is needed even at high temperatures. Among the structures of semiconductor devices, the area that can cause unstable electrical responses at high temperatures is the contact layer between the metal and the semiconductor. In this study, the effect of annealing conditions included in the process of forming a contact layer of nickel silicide(NiSix) on a p-type SiC layer on the specific contact resistance of the contact layer and the total resistance between the metal and the semiconductor was investigated. To this end, a series of electrodes for TLM (transfer length method) measurements were patterned on the 4 inch p-type SiC layer under conditions of changing annealing temperature of 1700 and 1800 ℃ and annealing time of 30 and 60 minutes. As a result, it was confirmed that the annealing conditions affect the resistance of the contact layer and the electrical stability of the device.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.5
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• pp.572-578
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• 2014

In order to overcome small current drivability of a tunneling field-effect transistor (TFET), a TFET using Schottky barrier (SBTFET) is proposed. The proposed device has a metal source region unlike the conventional TFET. In addition, dopant segregation technology between the source and channel region is applied to reduce tunneling resistance. For TFET fabrication, spacer technique is adopted to enable self-aligned process because the SBTFET consists of source and drain with different types. Also the control device which has a doped source region is made to compare the electrical characteristics with those of the SBTFET. From the measured results, the SBTFET shows better on/off switching property than the control device. The observed drive current is larger than those of the previously reported TFET. Also, short-channel effects (SCEs) are investigated through the comparison of electrical characteristics between the long- and short-channel SBTFET.