• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2010년도 춘계학술대회 논문집
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• pp.511-512
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• 2010

• 한국진공학회:학술대회논문집
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• 한국진공학회 2002년도 제23회 학술발표회 초록집
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• pp.179-179
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• 2002

• 한국전기전자재료학회논문지
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• 제23권7호
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• pp.575-579
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• 2010

The technologies of Ni/Cu plating contact is attributed to the reduced series resistance caused by a better contact conductivity of Ni with Si and the subsequent electroplating of Cu on Ni. The ability to pattern narrower grid lines for reduced light shading was combined with the lower resistance of a metal silicide contact and an improved conductivity of the plated deposit. This improves the FF (fill factor) as the series resistance is reduced. This is very much requried in the case of low concentrator solar cells in which the series resistance is one of the important and dominant parameter that affect the cell performance. A Selective emitter structure with highly dopeds regions underneath the metal contacts, is widely known to be one of the most promising high-efficiency solution in solar cell processing In this paper the formation of a selective emitter, and the nickel silicide seed layer at the front side metallization of silicon cells is considered. After generating the nickel seed layer the contacts were thickened by Cu LIP (light induced plating) and by the formation of a plated Ni/Cu two step metallization on front contacts. In fabricating a Ni/Cu plating metallization cell with a selective emitter structure it has been shown that the cell efficiency can be increased by at least 0.2%.

• 한국재료학회지
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• 제16권9호
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• pp.564-570
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• 2006

Silicides have been required to be below 40 nm-thick and to have low contact resistance without agglomeration at high silicidation temperature. We fabricated composite silicide layers on the wafers from Ni(20 nm)/Co(20 nm)/poly-Si(70 nm) structure by rapid thermal annealing of $700{\sim}1100^{\circ}C$ for 40 seconds. The sheet resistance, surface composition, cross-sectional microstructure, and surface roughness were investigated by a four point probe, a X-ray diffractometer, an Auger electron spectroscopy, a field emission scanning electron microscope, and a scanning probe microscope, respectively. The sheet resistance increased abruptly while thickness decreased as silicidation temperature increased. We propose that the fast metal diffusion along the silicon grain boundary lead to the poly silicon mixing and inversion. Our results imply that we may consider the serious thermal instability in designing and process for the sub-0.1 um CMOS devices.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.36-36
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• 2009

In this work, we describe a method to fabricate the Pt-silicided SB-MOSFETs with a n-type Silicon-On-Insulator (SOI) substrate as an active layer and demonstrate their electrical and structural properties. The fabricated SB-MOSFETs have novel structure and metal gate without sidewall. The gate oxide with a thickness of 7 nm was deposited by sputtering. Also, this fabrication processes were carried out below $500^{\circ}C$. As a result, Subthreshold swing value and on/off ratio of Fabricated SB MOSFETs was 70 [mV/dec] and $10^8$.

• 연구논문집
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• 통권29호
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• pp.163-171
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• 1999

A new titanium alloy system. Ti-xFe-ySi (x,y=0-4 wt%). was designed and characterized with the point at low cost and high strength for casting applications. Fe improved room and elevated temperature mechanical properties owing to solid solution hardening and beta phase stabilization. Si yielded titanium silicides and Si addition over 1 wt% resulted in poor ductility due to coarse silicide chains at prior beta boundaries. The optimum composition was found to be Ti-4Fe-(0.5-1)Si in the viewpoint of tensile strength and ductility which are comparable to the Ti-6Al-4V. The metal-mould reaction was also examined for Ti-xFe and Ti-xSi binary alloy system. The thickness of surface reaction layer w as not affected significantly with Fe content, while it was decreased with Si content. In the Ti-4Si alloy, no reaction layer was found. The depth of surface hardening layer was about $200\mum$ regardless of the mould materials.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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• pp.149.1-149.1
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• 2013

Noble metal silicides are widely used in silicon based microelectronic and optoelectronic devices. Among them, as compared to other silicides, structural and electronic properties of platinum silicide (PtSi) are found to be less sensitive to change in its dimensions. PtSi is known to overcome the junction spiking problems of Al-Si contacts. Present study is regarding the spatial evolution of platinum silicide in Pt/SiOx/Si. Scanning photoelectron emission microscopy (SPEM) was used for this purpose. SPEM images were obtained for pristine samples and after an annealing at $500^{\circ}C$ for 1 hr. Core-level spectra were recorded at different points in SPEM images contrasted by the intensity of Pt 4f7/2. Both Pt 4f and Si 2p spectra reveal the formation of PtSi after annealing. However, in contrast to earlier reports, PtSi formation is found to be non-uniform confirmed by the SPEM images and from the core level spectra taken at different intensity points.

• 한국재료학회지
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• 제1권3호
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• pp.168-174
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• 1991

Ti-Silicides를 single-Si wafer와 그 위에 oxide를 성장시킨 기판위에 composite target($TiSi_{2.6}$)을 sputtering함으로써 증착시켰다. 증착된 비정질 상태의 Ti-silicide는 급속 열처리(RTA)방법으로 $600^{\circ}C$에서 $850^{\circ}C$가지 20초간 처리하였다. RTA온도가 $800^{\circ}C$가 되어서야 비로소 안정한 $TiSi_2$가 형성되었으며, 그 때의 비저항 값은 $27~29{\mu}\Omega-cm$로 Ti-metal reactive방법에 의한 $TiSi_2$보다 약간 높은 값으로 드러났다. X-ray로 상천이를 조사한 결과 역시 $750^{\circ}C$가지 C49 $TiSi_2$가 형성되고, $800^{\circ}C$가 되어서야 안정한 C54 $TiSi_2$로의 상천이가 일어남을 나타내고 있다. 또한 완전히 형성된 Ti-silicide의 조성비는 x-ray photoelectron spectroscopy(XPS)결과에서 Ti : Si이 1 : 2로 드러났으며, 그 동안 reactive 시켰을 때 $TiSi_2$의 단점으로 지적되어 왔던 형성 완료된 $TiSi_2$의 surface roughness는 $17{\pm}1mm$이내로 매우 우수한 값으로 판명되어, device에 대한 응용 가능성을 높이고 있다.

• 한국세라믹학회지
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• 제43권4호
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• pp.230-234
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• 2006

Metal-Induced Crystallization (MIC) of amorphous silicon (a-Si) using aluminum and nickel as catalysts were performed with a variation of metal thickness and temperature. Raman results showed that the crystallization of a-Si depended on the thickness of aluminum while not on nickel. Nickel that forms silicide nodules during annealing simply catalyzed the formation of crystalline silicon (c-Si) while aluminum was consumed and transferred during MIC, which resulted in more complex microstructural characteristics. Crystalline silicons after NIC had elongated shape with a twin along the long axis. Morphological change after Aluminum-Induced Crystallization (AIC) showed more equiaxial grains. The nucleation and growth mechanism of AIC was discussed.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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• pp.140.1-140.1
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• 2013

The native silicon-oxide (SiOx) layer at the metal/Silicon interface acts as an electrical resistance to the metal contact of devices. Various methods are proposed for removing this layer, such as sputtering before metal contact formation or high temperature annealing. We studied the chemical evolution of the Au/SiOx/Si system during the annealing at $500^{\circ}C$ using a spatially resolved photoelectron emission method. Scanning photoelectron emission microscopy (SPEM) and core level spectra from local area of the sample show the inhomogeneous oxidation and formation of silicide of Au, as well as valence band spectra reveals the role of Au atoms during the dissociation process of SiOx.