• Title/Summary/Keyword: Metal oxide semiconductor

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Fabrication of branched Ga2O3 nanowires by post annealing with Au seeds

  • Lee, Mi-Seon;Seo, Chang-Su;Gang, Hyeon-Cheol
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.203-203
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    • 2015
  • Gallium Oxide (Ga2O3) has been widely investigated for the optoelectronic applications due to its wide bandgap and the optical transparency. Recently, with the development of fabrication techniques in nanometer scale semiconductor materials, there have been an increasing number of extensive reports on the synthesis and characterization of Ga2O3 nano-structures such as nano-wires, nano-belts, and nano-dots. In contrast to typical vapor-liquid-solid growth mode with metal catalysts to synthesis 1-dimensional nano-wires, there are several difficulties in fabricating the nano-structures by using sputtering techniques. This is attributed to the fact that relatively low growth temperatures and higher growth rate compared with chemical vapor deposition method. In this study, Ga2O3 nanowires (NWs) were synthesized by using radio-frequency magnetron sputtering method. The NWs were then coated by Au thin films and annealed under Ar or N2 gas enviroment with no supply of Gallium and Oxygen source. Several samples were prepared with varying the post annealing parameters such as gas environment annealing time, annealing temperature. Samples were characterized by using XRD, SEM, and PL measurements. In this presentation, the details of fabrication process and physical properties of branched Ga2O3 NWs will be reported.

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Investigation of characteristic on Solution-Processed Al-Zn-Sn-O Pseudo Metal-Oxide-Semiconductor Field-Effect-Transistor using microwave annealing

  • Kim, Seung-Tae;Mun, Seong-Wan;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.206.2-206.2
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    • 2015
  • 최근 비정질 산화물 반도체 thin film transistor(TFT)는 차세대 투명 디스플레이로 많은 관심을 받고 있으며 활발한 연구가 진행되고 있다. 산화물 반도체 TFT는 기존의 비정질 실리콘 반도체에 비하여 큰 on/off 전류비, 높은 이동도 그리고 낮은 구동전압으로 인하여 차세대 투명 디스플레이 산업에 적용 가능하다는 장점이 있다. 한편 기존의 sputter나 evaporator를 이용한 증착 방식은 우수한 막의 특성에도 불구하고 많은 시간과 제작비용이 든다는 단점을 가지고 있다. 따라서 본 연구에서는 별도의 고진공 시스템이 필요하지 않을 뿐만 아니라 대면적화에도 유리한 용액공정 방식을 이용하여 박막 트렌지스터를 제작하였으며 thermal 열처리와 microwave 열처리 방식에 따른 전기적 특성을 비교 및 분석하고 각 열처리 방식의 열처리 온도 및 조건을 최적화 하였다. 제작된 박막 트렌지스터는 p-type bulk silicon 위에 산화막이 100 nm 형성된 기판에 spin coater을 이용하여 Al-Zn-Sn-O 박막을 형성하였다. 연속해서 photolithography 공정과 BOE (30:1) 습식 식각 과정을 이용해 활성화 영역을 형성하여 소자를 제작하였다. 제작 된 소자는 Pseudo-MOS FET구조이며, 프로브 탐침을 증착 된 채널층 표면에 직접 접촉시켜 소스와 드레인 역할을 대체하여 동작시킬 수 있어 전기적 특성평가가 용이하다는 장점을 가지고 있다. 그 결과, microwave를 통해 열처리한 소자는 100oC 이하의 낮은 열처리 온도에도 불구하고 furnace를 이용하여 열처리한 소자와 비교하여 subthreshold swing(SS), Ion/off ratio, field-effectmobility 등이 개선되는 것을 확인하였다. 따라서, microwave 열처리 공정은 향후 저온 공정을 요구하는 MOSFET 제작 시의 훌륭한 대안으로 사용 될 것으로 기대된다.

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Al$_2$O$_3$ formation on Si by catalytic chemical vapour deposition

  • Ogita, Yoh-Ichiro;Shinshi Iehara;Toshiyuki Tomita
    • Electrical & Electronic Materials
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    • v.16 no.9
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    • pp.63.1-63
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    • 2003
  • Catalytic chemical vapor deposition (Cat-CVD) has been developed to deposit alumina(Al$_2$O$_3$) thin films on silicon (Si) crystal using N$_2$ bubbled tir-methyl aluminium [Al(CH$_3$)$_3$, TMA] and molecular oxygen (O$_2$) as source species and tungsten wires as a catalyzer. The catalyzer dissociated TMA at approximately 600$^{\circ}C$ The maximum deposition rate was 18 nm/min at a catalyzer temperature of 1000 and substrate temperature of 800$^{\circ}C$. Metal oxide semiconductor (MOS) diodes were fabricated using gates composed of 32.5-nm-thick alumina film deposited as a substrate temperature of 400oC. The capacitance measurements resulted in a relatively dielectric constant of 7, 4, fixed charge density of 1.74*10e12/$\textrm{cm}^2$, small hysteresis voltage of 0.12V, and very few interface trapping charge. The leakage current was 5.01*10e-7 A/$\textrm{cm}^2$ at a gate bias of 1V.

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A Study on the Five Senses Information Processing for HCI (HCI를 위한 오감정보처리에 관한 연구)

  • Lee, Hyeon Gu;Kim, Dong Kyu
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.5 no.2
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    • pp.77-85
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    • 2009
  • In this paper, we propose data format for smell, taste, touch with speech and vision which can be transmitted and implement a floral scent detection and recognition system. We provide representation method of data of smell, taste, and touch. Also, proposed floral scent recognition system consists of three module such as floral scent acquisition module using Metal Oxide Semiconductor (MOS) sensor array, entropy-based floral scent detection module, and floral scent recognition module using correlation coefficients. The proposed system calculates correlation coefficients of the individual sensor between feature vector(16 sensors) from floral scent input point until the stable region and 12 types of reference models. Then, this system selects the floral scent with the maximum similarity to the calculated average of individual correlation coefficients. To evaluate the floral scent recognition system using correlation coefficients, we implemented an individual floral scent recognition system using K-NN with PCA and LDA that are generally used in conventional electronic noses. In the experimental results, the proposed system performs approximately 95.7% average recognition rate.

Extraction of Threshold Voltage for Junctionless Double Gate MOSFET (무접합 이중 게이트 MOSFET에서 문턱전압 추출)

  • Jung, Hak Kee
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.31 no.3
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    • pp.146-151
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    • 2018
  • In this study, we compared the threshold-voltage extraction methods of accumulation-type JLDG (junctionless double-gate) MOSFETs (metal-oxide semiconductor field-effect transistors). Threshold voltage is the most basic element of transistor design; therefore, accurate threshold-voltage extraction is the most important factor in integrated-circuit design. For this purpose, analytical potential distributions were obtained and diffusion-drift current equations for these potential distributions were used. There are the ${\phi}_{min}$ method, based on the physical concept; the linear extrapolation method; and the second and third derivative method from the $I_d-V_g$ relation. We observed that the threshold-voltages extracted using the maximum value of TD (third derivatives) and the ${\phi}_{min}$ method were the most reasonable in JLDG MOSFETs. In the case of 20 nm channel length or more, similar results were obtained for other methods, except for the linear extrapolation method. However, when the channel length is below 20 nm, only the ${\phi}_{min}$ method and the TD method reflected the short-channel effect.

Design of UHF CMOS Front-ends for Near-field Communications

  • Hamedi-Hagh, Sotoudeh;Tabesh, Maryam;Oh, Soo-Seok;Park, Noh-Joon;Park, Dae-Hee
    • Journal of Electrical Engineering and Technology
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    • v.6 no.6
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    • pp.817-823
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    • 2011
  • This paper introduces an efficient voltage multiplier circuit for improved voltage gain and power efficiency of radio frequency identification (RFID) tags. The multiplier is fully integratable and takes advantage of both passive and active circuits to reduce the required input power while yielding the desired DC voltage. A six-stage voltage multiplier and an ultralow power voltage regulator are designed in a 0.13 ${\mu}m$ complementary metal-oxide semiconductor process for 2.45 GHz RFID applications. The minimum required input power for a 1.2 V supply voltage in the case of a 50 ${\Omega}$ antenna is -20.45 dBm. The efficiency is 15.95% for a 1 $M{\Omega}$ load. The regulator consumes 129 nW DC power and maintains the reference voltage in a 1.1% range with $V_{dd}$ varying from 0.8 to 2 V. The power supply noise rejection of the regulator is 42 dB near a 2.45 GHz frequency and performs better than -32 dB from 100 Hz to 10 GHz frequencies.

Characteristics of Nanowire CMOS Inverter with Gate Overlap (Gate Overlap에 따른 나노선 CMOS Inverter 특성 연구)

  • Yoo, Jeuk;Kim, Yoonjoong;Lim, Doohyeok;Kim, Sangsig
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.66 no.10
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    • pp.1494-1498
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    • 2017
  • In this study, we investigate the influence of an overlap between the gate and source/drain regions of silicon nanowire (SiNW) CMOS (complementary metal-oxide-semiconductor) inverter on bendable plastic substrates and describe their electrical characteristics. The combination of n-channel silicon nanowire field-effect transistor (n-SiNWFET) and p-channel silicon nanowire field-effect transistor (p-SiNWFET) operates as an inverter logic gate. The gains with a drain voltage ($V_{dd}$) of 1 V are 3.07 and 1.21 for overlapped device and non-overlapped device, respectively. The superior electrical characteristics of each of the SiNW transistors including steep subthreshold slopes and the high $I_{on}/I_{off}$ ratios are major factors that enable the excellent operation of the logic gate.

Edge Adaptive Color Interpolation for Ultra-Small HD-Grade CMOS Video Sensor in Camera Phones

  • Jang, Won-Woo;Kim, Joo-Hyun;Yang, Hoon-Gee;Lee, Gi-Dong;Kang, Bong-Soon
    • Journal of information and communication convergence engineering
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    • v.8 no.1
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    • pp.51-58
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    • 2010
  • This paper proposes an edge adaptive color interpolation for an ultra-small HD-grade complementary metal-oxide semiconductor (CMOS) video sensor in camera phones that can process 720-p/30-fps videos. Recently, proposed methods with great image quality perceptually reconstruct the green component and then estimate the red/blue component using the reconstructed green and neighbor red and blue pixels. However, these methods require the bulky memory line buffers in order to temporally store the reconstructed green components. The edge adaptive color interpolation method uses seven or nine patterns to calculate the six edge directions. At the same time, the threshold values are adaptively adjusted by the sum of the color values of the selected pixels. This method selects the suitable one among the patterns using two flowcharts proposed in this paper, and then interpolates the missing color values. For verification, we calculated the peak-signal-to-noise-ratio (PSNR) in the test images, which were processed by the proposed algorithm, and compared the calculated PSNR of the existing methods. The proposed color interpolation is also fabricated with the 0.18-${\mu}m$ CMOS flash memory process.

Manufacture and Estimation of Two phase driver for Linear Pulse Motor (리니어펄스모터의 2상 구동드라이버 제작 및 평가)

  • Kim, Dong-Hee;Kang, Geon-Il;Ahn, Jae-Young;Kim, Kwang-Heon;Lim, Young-Cheol;Park, Sung-Jun
    • Proceedings of the KIPE Conference
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    • 2007.11a
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    • pp.69-71
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    • 2007
  • Need correct analysis of thrust for control performance improvement of HB-LPM (Hybrid type Linear Pulse Motor). It is difficult to analyze HB-LPM's thrust. In this paper, HB-LPM's thrust is expressed to mathematical expression. And it is proved validity of this numerical formula by thrust measurement system. Two phase driver is composed. It is verified validity of numerical formula that measure waveform of electric current and voltage that is supplied in each phase. In this study, composed two phase drive driver, advantage of this IGBT element 6 by accumulated IPM module 1 Driver composition possible. That is, can economize 1 moule. In other words, Driver composition is available by IGBT or metal oxide semiconductor field effect transistor element 4. This is economical big gain.

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Properties of $SiO_2$ film oxidized in $N_2O$ gas ($N_2O$ 가스에서 열산화한 $SiO_2$ 막의 특성)

  • Kim, Dong-Seok;Choi, Hyun-Sik;Seo, Yong-Jin;Kim, Tae-Hyung;Kim, Chang-Il;Chang, Eui-Goo
    • Proceedings of the KIEE Conference
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    • 1992.07b
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    • pp.829-831
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    • 1992
  • Ultrathin metal-oxide-semiconductor(MOS) gate dielectrics have been fabricated by conventional thermal oxidation in $N_2O$ ambient. Compared to oxides grown in $O_2$, $N_2O$ oxides exhibit significantly low flatband voltage and small shift in flatband voltage. $N_2O$ oxidation induces a slight decrease in mobile ionic charge density($N_m$), fixed charge density($N_f$) and surface state charge density($N_{ss}$). This study establishes that $N_2O$ oxides may have a great impact on future MOS ULSI technology in which ultrathin gate dielectrics are required.

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