• Journal of Advanced Navigation Technology
• /
• v.27 no.6
• /
• pp.849-854
• /
• 2023

In this paper, a high-efficiency power amplifier was designed by applying the operating point Class J using LDMOS(laterally diffused metal oxide semiconductor) and optimizing the output matching circuit so that the second harmonic impedance becomes the reactance impedance. The designed power amplifier has a frequency of 108 ~ 110 MHz, Characteristics of PAE(power added efficiency) is 71.5% at P_SAT output (54.5 dBm), 55.5% at P_1dB output (51.5 dBm), and 24.38% at 45 dBm. The CSB(carrier with sideband) amplifier, which is the reference signal in the spatial modulation method, has an operating output of 45 dBm ~ 35 dBm, and linear SDM(sum in the depth of modulation) characteristics(40% ± 0.3%) were obtained. We measure the characteristics in amplitude modulation according to the bias operating point of the power amplifier for CSB and propose the optimal operating point to obtain linear modulation characteristics.

• Journal of Sensor Science and Technology
• /
• v.33 no.5
• /
• pp.288-297
• /
• 2024

Currently, numerous studies are being conducted on metal oxide semiconductor (MOS) gas sensors for hydrogen detection, using Palladium (Pd) and Pd-based alloy nanoparticles (NPs) owing to their hydrogen absorption ability. Furthermore, several studies have reported that Pd-Iridium (Ir) alloys possess high hydrogen absorption capabilities in their bulk state. However, Ir growth is limited to above 2 nm and it does not mix extensively with other metals. Furthermore, as the hydrogen absorption capacity decreases with the reduction in particle size, it is necessary to synthesize nanoparticles of an appropriate size. Therefore, the synthesis of Pd-Ir alloy NPs larger than 10 nm is challenging. In this study, we report the synthesis of Pd-Ir NPs with an average diameter of 19 nm using a hydrothermal technique for the first time and fabricated Pd-Ir alloy NPs through calcination at 500℃ in Ar and air. To confirm alloy formation and oxidation behavior, X-ray diffraction (XRD) and X-ray photoelectron spectroscopy (XPS) were performed. In addition, we synthesized Pd-Ir@CeO₂ core-shell nanoparticles (CSNPs) as hydrogen gas-sensing materials. The Pd-Ir core was partially oxidized during heat treatment at 500℃ in air, and Pd-Ir@CeO₂ CSNPs were finally changed into Pd-Ir(alloy)/PdO-IrO₂@CeO₂ CSNPs, which exhibited higher sensitivity and selectivity toward H₂ gas compared to totally oxidized PdO-IrO₂@CeO₂ CSNPs and pure CeO₂ NPs. The enhanced gas-sensing performance was attributed to the hydrogen absorption effect of the Pd-Ir(alloy) NPs.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2009.06a
• /
• pp.331-331
• /
• 2009

Hafnium oxide ($HfO_2$) attracted by one of the potential candidates for the replacement of si-based oxides. For applications of the high-k gate dielectric material, high thermodynamic stability and low interface-trap density are required. Furthermore, the amorphous film structure would be more effective to reduce the leakage current. To search the gate oxide materials, metal-insulator-metal (MIM) capacitors was fabricated by pulsed laser deposition (PLD) on indium tin oxide (ITO) coated glass with different oxygen pressures (30 and 50 mTorr) at room temperature, and they were deposited by Au/Ti metal as the top electrode patterned by conventional photolithography with an area of $3.14\times10^{-4}\;cm^2$. The results of XRD patterns indicate that all films have amorphous phase. Field emission scanning electron microscopy (FE-SEM) images show that the thickness of the $HfO_2$ films is typical 50 nm, and the grain size of the $HfO_2$ films increases as the oxygen pressure increases. The capacitance and leakage current of films were measured by a Agilent 4284A LCR meter and Keithley 4200 semiconductor parameter analyzer, respectively. Capacitance-voltage characteristics show that the capacitance at 1 MHz are 150 and 58 nF, and leakage current density of films indicate $7.8\times10^{-4}$ and $1.6\times10^{-3}\;A/cm^2$ grown at 30 and 50 mTorr, respectively. The optical properties of the $HfO_2$ films were demonstrated by UV-VIS spectrophotometer (Scinco, S-3100) having the wavelength from 190 to 900 nm. Because films show high transmittance (around 85 %), they are suitable as transparent devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2004.04b
• /
• pp.26-29
• /
• 2004

High density plasma fluorinated silicate glass (HDP FSG) is used as a gap fill film for metal-to-metal space because of many advantages. However, FSG films can cause critical problems such as bonding issue of top metal at package, metal contamination, metal peel-off, and so on. It is known that these problems are caused by fluorine penetration out of FSG film. To prevent it, FSG capping layers such like SRO (Silicon Rich Oxide) are needed. In this study, their characteristics and a capability to block fluorine penetration for various FSG capping layers are investigated. Normal stress and High stress due to denser film. While heat treatment to PETEOS caused lower blocking against fluorine penetration, it had insignificant effect on SiN. Compared with other layers, SRO using ARC chamber and SiN were shown a better performance to block fluorine penetration.

• Transactions on Electrical and Electronic Materials
• /
• v.12 no.1
• /
• pp.35-39
• /
• 2011

An electrically erasable programmable read-only memory (EEPROM) containing a stacked metal-insulator-metal (MIM) and n-well capacitor is proposed. It was fabricated using a 0.18 $\mu$m standard complementary metal-oxide semiconductor process. The depletion capacitance of the n-well region was effectively applied without sacrificing the cell-area and control gate coupling ratio. The device performed very similarly to the MIM capacitor cell regardless of the smaller cell area. This is attributed to the high control gate coupling ratio and capacitance. The erase speed of the proposed EEPROM was faster than that of the cell containing the MIM control gate.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2007.11a
• /
• pp.9-10
• /
• 2007

In this paper, Thin films of $HfO_2$/Hf were deposited on p-type wafer by Atomic Layer Deposition(ALD). And we studied the electrical characterization of $HfO_2$/Hf/Si MOS capacitor depending on thickness of Hf metal layer. $HfO_2$ films were deposited using TEMAH and $O_3\;at\;350^{\circ}C$. Samples were then annealed using furnace heating to $500^{\circ}C$. The MOS capacitor of round-type was fabricated on Si substrates. Through TEM(Transmission Electron Microscope), XRD(X-ray Diffraction), capacitance-voltage(C-V) and current-voltage(I-V) analysis, the role of thin Hf metal layer for the better $HfO_2$/Si interface property was investigated.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2004.07a
• /
• pp.300-303
• /
• 2004

To fill the gap of films for metal-to-metal space High density plasma fluorinated silicate glass (HDP FSG) is used due to various advantages. However, FSG films can have critical drawbacks such as bonding issue of top metal at package, metal contamination, metal peel-off, and so on. These problems are generally caused by fluorine penetration out of FSG film. Hence, FSG capping layers such like SRO(Silicon Rich Oxide) are required to prevent flourine penetration. In this study, their characteristics and a capability to block fluorine penetration for various FSG capping layers are investigated through FTIR analysis. FTIR graphs of both SRO using ARC chamber and SiN show that clear Si-H bonds at $2175{\sim}2300cm^{-1}$. Thus, Si-H bond at $2175{\sim}2300cm^{-1}$ of FSG capping layers lays a key role to block fluorine penetration as well as dangling bond.

• Journal of Sensor Science and Technology
• /
• v.22 no.4
• /
• pp.286-291
• /
• 2013

This paper presents to analyze patterns from single and complex malodors using gas sensor array based on metal oxide semiconductors. The aim of research is to identify and discriminate single malodors such as $NH_3$, $CH_3SH$ and $H_2S$ and their mixtures according to concentration levels. Measurement system for analyzing patterns from malodors is constructed by an array of metal oxide semiconductor sensors which are available commercially together with associate electronics. The patterns from sensory system are analyzed by Principal Component Analysis (PCA) which is simple statistical pattern recognition technique. Throughout the experimental trails, we confirmed the experimental procedure for measurement system such as sensors calibration time and gas flow rate, and discriminated malodors using pattern analysis technique.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2013.08a
• /
• pp.241.1-241.1
• /
• 2013

최근 고집적화된 금속-산화막 반도체 metal oxide semiconductor (MOS) 소자는 크기가 점점 작아짐에 따라 얇은 산화막과 다양한 High-K 물질과 전극에 대하여 연구되고 있다. 이러한 소자의 열적 안정성과 균일성을 얻기 위해 다양한 열처리 방법이 사용되고 있으며, 일반적인 열처리 방법으로는 conventional thermal annealing (CTA)과 rapid thermal annealing (RTA)이 많이 이용되고 있다. 본 실험에서는 microwave radiation에 의한 열처리로 소자의 특성을 개선시킬 수 있다는 사실을 확인하였고, 상대적으로 $100^{\circ}C$ 이하의 저온에서도 공정이 이루어지기 때문에 열에 의한 소자 특성의 열화를 억제할 수 있으며, 또한 짧은 처리 시간 및 공정의 단순화로 비용을 효과적으로 절감할 수 있다. 본 실험에서는 metal-oxide-silicon (MOS) 구조의 capacitor를 제작한 다음, 기존의 CTA나 RTA 처리가 아닌 microwave radiation을 실시하여 MOS capacitor의 전기적인 특성에 미치는 microwave radiation 효과를 평가하였다. 본 실험은 p-type Si 기판에 wet oxidation으로 300 nm 성장된 SiO2 산화막 위에 titanium/aluminium (Ti/Al) 금속 전극을 E-beam evaporator로 형성하여 capacitance-voltage (C-V) 특성 및 current-voltage (I-V) 특성을 평가하였다. 그 결과, microwave 처리를 통해 flat band voltage와 hysteresis 등이 개선되는 것을 확인하였고, microwave radiation 파워와 처리 시간을 최적화하였다. 또한 일반적인 CTA 열처리 소자와 비교하여 유사한 전기적 특성을 확인하였다. 이와 같은 microwave radiation 처리는 매우 낮은 온도에서 공정이 이루어짐에도 불구하고 시료 내에서의 microwave 에너지의 흡수가 CTA나 RTA 공정에서의 열에너지 흡수보다 훨씬 효율적으로 이루어지며, 결과적으로 산화막과 실리콘 기판의 계면 특성 개선에 매우 효과적이라는 것을 나타낸다. 따라서, microwave radiation 처리는 향후 저온공정을 요구하는 nano-scale MOSFET의 제작 및 저온 공정이 필수적인 display 소자 제작의 해결책으로 기대한다.

• Journal of Advanced Navigation Technology
• /
• v.17 no.6
• /
• pp.700-704
• /
• 2013

Quantum-dot cellular automata(QCA) is a new technology and it is an one of the alternative high performance over existing complementary metal-oxide semi-conductor(CMOS). QCA is nanoscale device and ultra-low power consumption compared with transistor-based technologies, and various circuits using QCA technology have been proposed. Binary-coded decimal(BCD), which represents decimal digits in binary, is mainly used in electronic circuits and Microprocessor, and it is comfortable in conversion operation but many data loss. In this paper, we present an BCD-EXCESS 3 Code converter which can be efficiently used for subtraction and half adjust. The proposed scheme has efficiently designed considering space and time complexities and minimization of noise, and it has been simulated and confirmed.