• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.281.1-281.1
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• 2016

Transition metal dichalcogenides (TMDCs) are promising layered structure materials for next-generation nano electronic devices. Many investigation on the FET device using TMDCs channel material have been performed with some integrated approach. To use TMDCs for channel material of top-gate thin film transistor(TFT), the study on high-k dielectrics on TMDCs is necessary. However, uniform growth of atomic-layer-deposited high-k dielectric film on TMDCs is difficult, owing to the lack of dangling bonds and functional groups on TMDC's basal plane. We demonstrate the effect of remote oxygen plasma pretreatment of large area synthesized few-layer MoSe2 on the growth behavior of Al2O3, which were formed by atomic layer deposition (ALD) using tri-methylaluminum (TMA) metal precursors with water oxidant. We investigated uniformity of Al2O3 by Atomic force microscopy (AFM) and Scanning electron microscopy (SEM). Raman features of MoSe2 with remote plasma pretreatment time were obtained to confirm physical plasma damage. In addition, X-ray photoelectron spectroscopy (XPS) was measured to investigate the reaction between MoSe2 and oxygen atom after the remote O2 plasma pretreatment. Finally, we have uniform Al2O3 thin film on the MoSe2 by remote O2 plasma pretreatment before ALD. This study can provide interfacial engineering process to decrease the leakage current and to improve mobility of top-gate TFT much higher.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.317-318
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• 2012

현재의 반도체 산업에서 Hafnium oxide와 Hafnium silicates같은 high-k 물질은 CMOS gate와 DRAM capacitor dielectrics로 사용하기 위한 대표적인 물질에 속한다. MOSFET (metal oxide semiconductor field effect transistor)구조에서 gate length는 16 nm 이하로 계속 미세화가 연구 중이고, 또한 gate는 기존구조에서 Multi-gate구조로 다변화가 일어나고 있다. 이를 통해 게이트 절연막은 그 구조와 활용범위가 다양해지게 될 것이다. 동시에 leakage current와 dielectric break-down을 감소시키는 연구가 중요해지고 있다. 그러나 나노 영역에서의 기계적 특성에 대한 연구는 전무한 상태이다. 따라서 복잡한 회로 공정, 다양한 Multi-gate 구조, 신뢰도의 향상을 위해서는 유전박막 물질자체와 계면에서의 물리적, 기계적인 특징의 측정이 상당히 중요해지고 있다. 이에 본 연구는 Nano-indenter의 통해 경도(Hardness)와 탄성계수(Elastic modulus) 등의 측정을 통하여 시료 표면의 나노영역에서의 기계적 특성을 연구하고자 하였다. $HfO_2$게이트 절연막은 rf magnetron sputter를 이용해 Si (silicon) (100)기판위에 박막형태로 증착하였고, 이후 furnace에서 질소분위기로 온도(400, 450, $500^{\circ}C$)를 달리하여 20분 열처리를 하였다. 또한 Weibull distribution을 이용해 박막의 characteristic value를 계산하였으며, 실험결과 열처리 온도가 $400^{\circ}C$에서 $500^{\circ}C$로 증가함에 따라 경도와 탄성계수는 7.4 GPa에서 10.65 GPa으로 120.25 GPa에서 137.95 GPa으로 각각 증가하였다. 이는 재료적 측면으로 재료의 구조적 우수성이 증가된 것으로 판단된다.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.2
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• pp.107-112
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• 2005

We present an AlGaN/GaN metal-insulator-semiconductor-heterostructure field effect transistor (MIS-HFET) with an $Al_2O_3-HfO_2$ laminated high-k dielectric, deposited by plasma enhanced atomic layer deposition (PEALD). Based on capacitance-voltage measurements, the dielectric constant of the deposited $Al_2O_3-HfO_2$ laminated layer was estimated to be as high as 15. The fabricated MIS-HFET with a gate length of 102 m exhibited a maximum drain current of 500 mA/mm and maximum tr-ansconductance of 125 mS/mm. The gate leakage current was at least 4 orders of magnitude lower than that of the reference HFET. The pulsed current-voltage curve revealed that the $Al_2O_3-HfO_2$ laminated dielectric effectively passivated the surface of the device.

• Journal of Information Display
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• v.13 no.3
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• pp.113-118
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• 2012

Metal oxide semiconductors were considered promising materials as backplanes of future displays. Moreover, the adoption of carrier-suppressing metal into indium-zinc oxide (IZO) has become one of the most important themes in the metal oxide research field. In this paper, efforts to realize and optimize IZO with diverse types of carrier suppressors are summarized. Properties such as the band gap of metal in the oxidized form and its electronegativity were examined to confirm their relationship with the metal's carrier-suppressing ability. It was concluded that those two properties could be used as indicators of the carrier-suppressing ability of a material. As predicted by the properties, the alkali earth metals and early transition metals used in the research effectively suppressed the carrier and optimized the electrical properties of the metal oxide semiconductors. With the carrier-suppressing metals, IZO-based thin-film transistors with high (above $1cm^2/V{\cdot}s$) mobility, a lower than 0.6V/dec sub-threshold gate swing, and an over $3{\times}10^6$ on-to-off current ratio could be achieved.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.114-114
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• 2012

Metal-oxide-semiconductor field-effect transistors (MOSFETs)의 critical dimension (CD)가 sub 45 nm로 줄어듬에 따라 기존에 gate dielectric으로 사용하고 있는 SiO2에서 발생되는 high gate leakage current 때문에 새로운 high dielectric constant (k) 물질들이 연구되기 시작하였다. 여러 가지 high-k 물질 중에서, aluminum-oxide (Al2O3)는 높은 dielectric constant (~10)와 전자 터널링 barrier height (~2eV) 등을 가지기 때문에 많은 연구가 되고 있다. 그러나 Al2O3를 anisotropic한 patterning을 하기 위해 주로 사용되고 있는 halogen-based 플라즈마 식각 과정에서 나타나는 Al2O3와 하부 layer간의 낮은 식각 selectivity 뿐만 아니라 표면에 발생되는 defect, stoichiometry modification, roughness 변화 등의 많은 문제점들로 인하여 device performance가 감소하기 때문에 이를 해결하기 위한 많은 연구들이 진행중이다. 따라서 본 연구에서는 실리콘 기판위의 atomic layer deposition (ALD)로 증착된 Al2O3를 BCl3/Ar 중성빔을 이용하여 원자층 식각한 후 식각 특성을 분석해 보았다. Al2O3 표면을 BCl3로 absorption시킨 후 Ar 중성빔으로 desorption 시키는 과정에서 volatile한 aluminum-chlorides와 boron oxychloride가 형성되어 layer by layer로 제거됨을 관찰 할 수 있었다.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.2
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• pp.164-169
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• 2008

The effects of the antisite related defects on the electronic structure of silica and the gate leakage current have been investigated using first-principles calculations. Energy levels related to the antisite defects in silicon dioxide have been introduced into the bandgap, which are nearly 2.0 eV from the top of the valence band. Combining with the electronic structures calculated from first-principles simulations, tunneling currents through the silica layer with antisite defects have been calculated. The tunneling current calculations show that the hole tunneling currents assisted by the antisite defects will be dominant at low oxide field whereas the electron direct tunneling current will be dominant at high oxide field. With increased thickness of the defect layer, the threshold point where the hole tunneling current assisted by antisite defects in silica is equal to the electron direct tunneling current extends to higher oxide field.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.149-149
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• 2008

Metal-Insulator-Metal(MIM) capacitors have been studied extensively for next generation of high-density dynamic random access memory (DRAM) devices. Of several candidates for metal electrodes, Ru or its conducting oxide $RuO_2$ is the most promising material due to process maturity, feasibility, and reliability. ALD can be used to form the Ru and RuO2 electrode because of its inherent ability to achieve high level of conformality and step coverage. Moreover, it enables precise control of film thickness at atomic dimensions as a result of self-limited surface reactions. Recently, ALD processes for Ru and $RuO_2$, including plasma-enhanced ALD, have been studied for various semiconductor applications, such as gate metal electrodes, Cu interconnections, and capacitor electrodes. We investigated Ru/$RuO_2$ thin films by thermal ALD with various deposition parameters such as deposition temperature, oxygen flow rate, and source pulse time. Ru and $RuO_2$ thin films were grown by ALD(Lucida D150, NCD Co.) using RuDi as precursor and O2 gas as a reactant at $200\sim350^{\circ}C$.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1193-1196
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• 2009

Low resistivity interconnection and high-mobility channel are required to realize ultrahigh-definition LCDs such as 4k ${\times}$ 2k TVs. We evaluated fully Cu-based gate and Source/Drain interconnections, consisting of stacked pure-Cu/Cu-Mn layers for TFT-LCDs, and found the underlying Cu-Mn alloy film has superior adhesion to glass substrates and CVD-SiOx films. It was also confirmed that wet etching of the Cu/Cu-Mn films without residues and low contact resistance with both channel IGZO and pixel ITO films can be obtained. It is thus considered that the stacked Cu/Cu-Mn structure is one of candidates to replacing conventionally pure-Cu/refractory metal.

• Journal of IKEEE
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• v.17 no.4
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• pp.531-536
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• 2013

The impact of UV irradiation process on the AlGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistor was investigated. Due to the high intensity UV irradiation before the gate dielectric deposition, the conductivity of AlGaN/GaN structure and the drain saturation current of the transistor increased by about 10 %. However, the pinch off characteristics of transistor was severely deformed by the process. By comparing the electrical characteristics of the transistors, it was proposed that the high intensity UV irradiation formed a sub-channel under the two dimensional electron gas of AlGaN/GaN structure even without additional impurity injection.

• Journal of IKEEE
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• v.20 no.3
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• pp.220-225
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• 2016

In this paer, low on-resistance and high-power trench gate MOSFET (Metal-Oxide-Silicon Field Effect Transistor) incorporating current sensing FET (Field Effect Transistor) is proposed and evaluated. The trench gate power MOSFET was fabricated with $0.6{\mu}m$ trench width and $3.0{\mu}m$ cell pitch. Compared with the main switching MOSFET, the on-chip current sensing FET has the same device structure and geometry. In order to improve cell density and device reliability, self-aligned trench etching and hydrogen annealing techniques were performed. Moreover, maintaining low threshold voltage and simultaneously improving gate oxide relialility, the stacked gate oxide structure combining thermal and CVD (chemical vapor deposition) oxides was adopted. The on-resistance and breakdown voltage of the high density trench gate device were evaluated $24m{\Omega}$ and 100 V, respectively. The measured current sensing ratio and it's variation depending on the gate voltage were approximately 70:1 and less than 5.6 %.