• Title/Summary/Keyword: Metal etch

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The Properties of High Speed AlGaAs/GaAs Infrared LED by using Metal wet etch process (습식식각공정에 의한 High Speed용 AlGaAs/GaAs 적외선 LED 소자의 특성)

  • Lee, Cheol-Jin;Ra, Yong-Choon;Sung, Man-Young;Lee, Eun-Chul
    • Proceedings of the KIEE Conference
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    • 1995.11a
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    • pp.352-354
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    • 1995
  • The optical and electrical properties of High Speed AlGaAs infrared LED by using metal wet etch process instead of metal lift-off process are investigated. The power out increases when metal contact is patterned by wet etch process. Forward voltage and Reverse voltage for metal wet etch process represent higher value than the metal lift-off process. The aging effect of power out also indicates good results with wet etch process. The wet etch process for metal contact reveals reliable LED device properties.

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Silicon Nanostructures Fabricated by Metal-Assisted Chemical Etching of Silicon (MAC Etch를 이용한 Si 나노 구조 제조)

  • Oh, Ilwhan
    • Journal of the Korean Electrochemical Society
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    • v.16 no.1
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    • pp.1-8
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    • 2013
  • This review article summarizes metal-assisted chemical etching (MAC etch or MACE), an anisotropic etching method for Si, and describes principles, main factors, and recent achievements in literature. In 1990, it was discovered that, with metal catalyst on surface and $H_2O_2$/HF as etchant, Si substrate can be etched anisotropically, in even in solution. In contrast to high-cost vacuum-based dry etching methods, MAC etch enables to fabricate a variety of high aspect ratio nanostructures through wet etching process.

A Study on the corrosion property by post treatment in the metal dry etch (Metal 건식각 후처리에 따른 부식 특성에 관한 연구)

  • Mun, Seong-Yeol;Kang, Seong-Jun;Joung, Yang-Hee
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2007.10a
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    • pp.747-750
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    • 2007
  • This study proposes that chlorine residue after metal etch as the source of metal corrosion, and charges should be removed by optimizing etch, PR strip and cleaning condition. Charges distributed along the metal line acts as a source of tungsten (W) plug corrosion when associated with following cleaning solution. In cleaning process after metal etch and PR strip, chemical selection is significantly important in terms of metal corrosion. Optimal corrosion preventive PH, no metal attack (choice of optimal inhibitants), high by product removal efficiency and optimal de ionized water treatment condition is critical to the metal corrosion prevention.

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Effect of RF Etch Conditions on Metal Contact Resistance (금속 접촉 저항에 대한 RF 식각 조건의 영향)

  • Kim, Do-U;Jeong, Cheol-Mo;Gu, Gyeong-Wan;Wang, Jin-Seok
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.51 no.4
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    • pp.147-151
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    • 2002
  • The resistances of metal2 contact to metall and poly Si are checked by various RF etch conditions in terms of pre-cleaning. The changes of resistance are evaluated by statistical analysis method(SAS) for the AC bias power, coil power and RF target. The contact area on poly Si is shown by TEM image and the distributions of contact resistance according to ar etch target and RTP are investigated. The RTP groups have larger variations than normal RF etch targets. When the RF etch target becomes lower and coil power becomes higher, the resistances of metal2 contact to metals and poly Si have lower contact resistance. But the condition of AC bias power did not satisfied low meta12 contacts resistance for metall and poly Si simultaneously. The R-square of ststistical analysis was 0.98 for resistances of meta12 contact to poly Si and 0.87 for resistances of meta12 contact to metall.

Employing Al Etch Stop Layer for Nb-based SNS Josephson Junction Fabrication Process (Al 식각정지층을 이용한 Nb-based SNS 조셉슨 접합의 제조공정)

  • Choi, J.S.;Park, J.H.;Song, W.;Chong, Y.
    • Progress in Superconductivity
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    • v.12 no.2
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    • pp.114-117
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    • 2011
  • We report our efforts on the development of Nb-based non-hysteretic Josephson junction fabrication process for quantu device applications. By adopting and modifying the existing Nb-aluminum oxide tunnel junction process, we develop a process for non-hysteretic Josephson junction circuits using metal-silicide as metallic barrier material. We use sputter deposition of Nb and $MoSi_2$, PECVD deposition of silicon oxide as insulator material, and ICP-RIE for metal and oxide etch. The advantage of the metal-silicide barrier in the Nb junction process is that it can be etched in $SF_6$ RIE together with Nb electrode. In order to define a junction area precisely and uniformly, end-point detection for the RIE process is critical. In this paper, we employed thin Al layer for the etch stop, and optimized the etch condition. We have successfully demonstrated that the etch stop properties of the inserted Al layer give a uniform etch profile and a precise thickness control of the base electrode in Nb trilayer junctions.

Use of Hard Mask for Finer (<10 μm) Through Silicon Vias (TSVs) Etching

  • Choi, Somang;Hong, Sang Jeen
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.6
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    • pp.312-316
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    • 2015
  • Through silicon via (TSV) technology holds the promise of chip-to-chip or chip-to-package interconnections for higher performance with reduced signal delay and power consumption. It includes high aspect ratio silicon etching, insulation liner deposition, and seamless metal filling. The desired etch profile should be straightforward, but high aspect ratio silicon etching is still a challenge. In this paper, we investigate the use of etch hard mask for finer TSVs etching to have clear definition of etched via pattern. Conventionally employed photoresist methods were initially evaluated as reference processes, and oxide and metal hard mask were investigated. We admit that pure metal mask is rarely employed in industry, but the etch result of metal mask support why hard mask are more realistic for finer TSV etching than conventional photoresist and oxide mask.

Electrical Characterization of MOS (metal-oxide-semiconductor) Capacitors on Plasma Etch-damaged 4H-Silicon Carbide (플라즈마 에칭으로 손상된 4H-실리콘 카바이드 기판위에 제작된 MOS 커패시터의 전기적 특성)

  • 조남규;구상모;우용득;이상권
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.17 no.4
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    • pp.373-377
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    • 2004
  • We have investigated the electrical characterization of metal-oxide-semiconductor (MOS) capacitors formed on the inductively coupled plasma (ICP) etch-damaged both n- and p-type 4H-SiC. We found that there was an effect of a sacrificial oxidation treatment on the etch-damaged surfaces. Current-voltage and capacitance-voltage measurements of these MOS capacitors were used and referenced to those of prepared control samples without etch damage. It has been found that a sacrificial oxidation treatment can improve the electrical characteristics of MOS capacitors on etch-damaged 4H-SiC since the effective interface density and fixed oxide charges of etch-damaged samples have been found to increase while the breakdown field strength of the oxide decreased and the barrier height at the SiC-SiO$_2$ interface decreased for MOS capacitors on etch-damaged surfaces.

Fabrication of Nanostructures by Dry Etching Using Dewetted Pt Islands as Etch-masks (Dewetting된 Pt Islands를 Etch Mask로 사용한 GaN 나노구조 제작)

  • Kim, Taek-Seung;Lee, Ji-Myon
    • Korean Journal of Materials Research
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    • v.16 no.3
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    • pp.151-156
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    • 2006
  • A method for fabrication of nano-scale GaN structure by inductively coupled plasma etching is proposed, exploiting a thermal dewetting of Pt thin film as an etch mask. The nano-scale Pt metal islands were formed by the dewetting of 2-dimensional film on $SiO_2$ dielectric materials during rapid thermal annealing process. For the case of 30 nm thick Pt films, pattern formation and dewetting was initiated at temperatures greater $600^{\circ}C$. Controlling the annealing temperature and time as well as the thickness of the Pt metal film affected the size and density of Pt islands. The activation energy for the formation of Pt metal island was calculated to be 23.2 KJ/mole. The islands show good resistance to dry etching by a $CF_4$ based plasma for dielectric etching indicating that the metal islands produced by dewetting are suitable for use as an etch mask in the fabrication of nano-scale structures.

Investigation of defects and surface polarity in AlN and GaN using wet chemical etching technique (화학적 습식 에칭을 통한 AlN와 GaN의 결함 및 표면 특성 분석)

  • Hong, Yoon Pyo;Park, Jae Hwa;Park, Cheol Woo;Kim, Hyun Mi;Oh, Dong Keun;Choi, Bong Geun;Lee, Seong Kuk;Shim, Kwang Bo
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.24 no.5
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    • pp.196-201
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    • 2014
  • We investigated defects and surface polarity in AlN and GaN by using wet chemical etching. Therefore, the effectiveness and reliability of estimating the single crystals by defect selective etching in NaOH/KOH eutectic alloy have been successfully demonstrated. High-quality AlN and GaN single crystals were etched in molten NaOH/KOH eutectic alloy. The etching characteristics and surface morphologies were carried out by scanning electron microscope (SEM) and atomic force microscope (AFM). The etch rates of AlN and GaN surface were calculated by etching depth as a function of etching time. As a result, two-types of etch pits with different sizes were revealed on AlN and GaN surface, respectively. Etching produced hexagonal pits on the metal-face (Al, Ga) (0001) plane, while hexagonal hillocks formed on the N-face. On etching rate calibration, it was found that N-face had approximately 109 and 15 times higher etch rate than the metal-face of AlN and GaN, respectively. The size of etch pits increased with an increase of the etching time and they tend to merge together with a neighbouring etch pits. Also, the chemical mechanism of each etching process was discussed. It was found that hydroxide ion ($OH^-$) and the dangling bond of nitrogen play an important role in the selective etching of the metal-face and N-face.

The Effects of Etch Chemicals on the Electrical Properties of Metal-Oxide-Semiconductor (MOS) Device with Plasma Enhanced Atomic Layer Deposited (PEALD) TiN Metal Electrode

  • Kim, Yeong-Jin;Han, Hun-Hui;Im, Dong-Hwan;Son, Seok-Gi;Sergeevich, Andrey;Choe, Chang-Hwan
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2015.11a
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    • pp.244-245
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    • 2015
  • PEALD TiN 금속 전극을 갖는 MOS device에서 SC1 ($NH_4/H_2O_2/H_2O=1:2:5$), SPM ($H_2SO_4/H_2O_2=10:1$), $H_2O_2$ etch chemical을 이용해 TiN 식각 후 oxide 표면 잔류 Ti에 의한 전기적 특성 분석을 진행 하였다. Etch chemical 중 SPM을 이용한 소자의 전기적 특성이 우수하였는데, 이는 잔류Ti atom의 양이 다른 etch chemical을 사용한 것 대비 낮았기 때문이다. 이로 인하여 낮은 leakage current, less frequency dependence의 특성이 관찰되었다. 또한, 후속 열처리를 통해 더욱 우수한 특성이 관찰 되었다. 이러한 공정기술은 single 전극을 갖는 CMOS 형성 시 사용 될 수 있을 것으로 기대된다.

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