• Korean Journal of Materials Research
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• v.20 no.1
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• pp.25-30
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• 2010

Si nanowire/multiwalled carbon nanotube nanocomposite arrays were synthesized. Vertically aligned Si nanowire arrays were fabricated by Ag nanodendrite-assisted wet chemical etching of n-type wafers using $HF/AgNO_3$ solution. The composite structure was synthesized by formation of a sheath of carbon multilayers on a Si nanowire template surface through a thermal CVD process under various conditions. The results of Raman spectroscopy, scanning electron microscopy, and high resolution transmission electron microcopy demonstrate that the obtained nanocomposite has a Si nanowire core/carbon nanotube shell structure. The remarkable feature of the proposed method is that the vertically aligned Si nanowire was encapsulated with a multiwalled carbon nanotube without metal catalysts, which is important for nanodevice fabrication. It can be expected that the introduction of Si nanowires into multiwalled carbon nanotubes may significantly alter their electronic and mechanical properties, and may even result in some unexpected material properties. The proposed method possesses great potential for fabricating other semiconductor/CNT nanocomposites.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.408-408
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• 2012

It is well known that magnetic random access memory (MRAM) is nonvolatile memory devices using ferromagnetic materials. MRAM has the merits such as fast access time, unlimited read/write endurance and nonvolatility. Although DRAM has many advantages containing high storage density, fast access time and low power consumption, it becomes volatile when the power is turned off. Owing to the attractive advantages of MRAM, MRAM is being spotlighted as an alternative device in the future. MRAM consists of magnetic tunnel junction (MTJ) stack and complementary metal- oxide semiconductor (CMOS). MTJ stacks are composed of various magnetic materials. FePt thin films are used as a pinned layer of MTJ stack. Up to date, an inductively coupled plasma reactive ion etching (ICPRIE) method of MTJ stacks showed better results in terms of etch rate and etch profile than any other methods such as ion milling, chemical assisted ion etching (CAIE), reactive ion etching (RIE). In order to improve etch profiles without redepositon, a better etching process of MTJ stack needs to be developed by using different etch gases and etch parameters. In this research, influences of $O_2$ gas on the etching characteristics of FePt thin films were investigated. FePt thin films were etched using ICPRIE in $CH_4/O_2/Ar$ gas mix. The etch rate and the etch selectivity were investigated in various $O_2$ concentrations. The etch profiles were studied in varying etch parameters such as coil rf power, dc-bias voltage, and gas pressure. TiN was employed as a hard mask. For observation etch profiles, field emission scanning electron microscopy (FESEM) was used.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.319-319
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• 2013

Even though the fabrication methods of metal oxide based thin film capacitor have been well established such as RF sputtering, Sol-gel, metal organic chemical vapor deposition (MOCVD), ion beam assisted deposition (IBAD) and pulsed laser deposition (PLD), an applicable capacitor of printed circuit board (PCB) has not realized yet by these methods. Barium Strontium Titanate (BST) and other high-k ceramic oxides are important materials used in integrated passive devices, multi-chip modules (MCM), high-density interconnect, and chip-scale packaging. Thin film multi-layer technology is strongly demanded for having high capacitance (120 nF/$mm^2$). In this study, we suggest novel multi-layer thin film capacitor design and fabrication technology utilized by plasma assisted deposition and photolithography processes. Ba0.6Sr0.4TiO3 (BST) was used for the dielectric material since it has high dielectric constant and low dielectric loss. 5-layered BST and Pt thin films with multi-layer sandwich structures were formed on Pt/Ti/$SiO_2$/Si substrate by RF-magnetron sputtering and DC-sputtering. Pt electrodes and BST layers were patterned to reveal internal electrodes by photolithography. SiO2 passivation layer was deposited by plasma-enhanced chemical vapor deposition (PE-CVD). The passivation layer plays an important role to prevent short connection between the electrodes. It was patterned to create holes for the connection between internal electrodes and external electrodes by reactive-ion etching (RIE). External contact pads were formed by Pt electrodes. The microstructure and dielectric characteristics of the capacitors were investigated by scanning electron microscopy (SEM) and impedance analyzer, respectively. In conclusion, the 0402 sized thin film multi-layer capacitors have been demonstrated, which have capacitance of 10 nF. They are expected to be used for decoupling purpose and have been fabricated with high yield.

• Current Photovoltaic Research
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• v.5 no.1
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• pp.25-27
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• 2017

Nanoscale textured black silicon has attracted intensive attention due to its great potential as applications in multicrystalline silicon-based solar cells. It absorbs sunlight over a broad range of wavelengths but introduces large recombination centers, non-uniform doping into cell. In this study, we present a metal-assisted chemical etching technique plus alkaline etching process to fabricate nanoscale pyramid structures with optimized condition. To make the structures, silver nanoparticles-loaded mc-Si wafer was submerged into $H_2O_2/HF$ solution first for nanohole texturing the wafer and textured wafer etched again with KOH solution for making nanoscale pyramid structures. The average reflectivity (350-1050 nm) is about 8.42% with anti-reflection coating.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• 2000.11a
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• pp.29-32
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• 2000

Cerium oxide thin film has been proposed as a buffer layer between the ferroelectric film and the Si substrate in Metal-Ferroelectric-Insulator-Silicon (MFIS ) structures for ferroelectric random access memory (FRAM) applications. In this study, CeO$_2$thin films were etched with Cl$_2$/Ar gas combination in an inductively coupled plasma (ICP). The highest etch rate of CeO$_2$film is 230 $\AA$/min at Cl$_2$/(Cl$_2$+Ar) gas mixing ratio of 0.2. This result confirms that CeO$_2$thin film is dominantly etched by Ar ions bombardment and is assisted by chemical reaction of Cl radicals. The selectivity of CeO$_2$to YMnO$_3$was 1.83. As a XPS analysis, the surface of etched CeO$_2$thin films was existed in Ce-Cl bond by chemical reaction between Ce and Cl. The results of XPS analysis were confirmed by SIMS analysis. The existence of Ce-Cl bonding was proven at 176.15 (a.m.u.).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.11a
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• pp.29-32
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• 2000

Cerium oxide thin film has been proposed as a buffer layer between the ferroelectric film and the Si substrate in Metal-Ferroelectric-Insulator-Silicon (MFIS ) structures for ferroelectric random access memory (FRAM) applications. In this study, CeO$_2$ thin films were etched with Cl$_2$/Ar gas combination in an inductively coupled plasma (ICP). The highest etch rate of CeO$_2$ film is 230 $\AA$/min at Cl$_2$/(Cl$_2$+Ar) gas mixing ratio of 0.2. This result confirms that CeO$_2$ thin film is dominantly etched by Ar ions bombardment and is assisted by chemical reaction of Cl radicals. The selectivity of CeO$_2$ to YMnO$_3$ was 1.83. As a XPS analysis, the surface of etched CeO$_2$ thin films was existed in Ce-Cl bond by chemical reaction between Ce and Cl. The results of XPS analysis were confirmed by SIMS analysis. The existence of Ce-Cl bonding was proven at 176.15 (a.m.u.).

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.11
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• pp.826-830
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• 2013

In this paper, we carried out the investigations of both etch characteristics and mechanisms for the $SnO_2$ thin films in $O_2/BCl_3/Ar$ plasma. The dry etching characteristics of the $SnO_2$ thin films was studied by varying the $O_2/BCl_3/Ar$ gas mixing ratio. We determined the optimized process conditions that were as follows: a RF power of 700 W, a DC-bias voltage of - 150 V, and a process pressure of 2 Pa. The maximum etch rate was 509.9 nm/min in $O_2/BCl_3/Ar$=(3:4:16 sccm) plasma. From XPS analysis, the etch mechanism of the $SnO_2$ thin films in the $O_2/BCl_3/Ar$ plasma can be identified as the ion-assisted chemical reaction while the role of ion bombardment includes the destruction of the metal-oxide bonds as well as the cleaning of the etched surface form the reaction products.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.150-150
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• 2008

본 연구에서는 Wet chemistry damage가 Nanopatterned p-ohmic electrode에 미치는 영향을 연구하였다. Nanopattern은 Metal clustering을 이용하여, P-GaN와 Ohmic형성에 유리한 Pd을 50$\AA$ 적층한 후 Rapid Thermal Annealing방법으로 $850^{\circ}C$, $N_2$분위기에서 3min열처리를 하여 Pd Clustering mask 를 제작하였다. Wet etching은 $85^{\circ}C$, $H_3PO_4$조건에서 시간에 따라 Sample을 Dipping하는 방법으로 시행하였다 Ohmic test를 위해서 Circular - Transmission line Model 방법을 이용하였으며, Atomic Force Microscopy과 Parameter Analyzer로 Nanopatterned GaN surface위에 형성된 Ni/ Au Contact에서의 전기적 분석과, 표면구조분석을 시행하였다. AFM결과 Wet처리시간에 따라서 Etching형상 및 Etch rate이 영향을 받는 것이 확인되었고, Ohmic test에서 Wet chemistry처리에 의한 Tunneling parameter와 Schottky Barrier Height가 크게 증/감함을 관찰하였다. 이러한 결과들은 Wet처리에 의해서 발생된 Defect가 GaN의 표면과 하부에서 발생되며, Deep acceptor trap 및 transfer거동과 밀접한 관련이 있음을 확인 할 수 있었다. 보다 자세한 Transport 및 Wet chemical처리영향에 관한 형성 Mechanism은 후에 I-V-T, I-V, C-V, AFM결과 들을 활용하여 발표할 예정이다.

• Korean Journal of Materials Research
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• v.23 no.7
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• pp.379-384
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• 2013

In order to produce size-controllable Ag nanoparticles and a nanomesh-patterned Si substrate, we introduce a rapid thermal annealing(RTA) method and a metal assisted chemical etching(MCE) process. Ag nanoparticles were self-organized from a thin Ag film on a Si substrate through the RTA process. The mean diameter of the nanoparticles was modulated by changing the thickness of the Ag film. Furthermore, we controlled the surface energy of the Si substrate by changing the Ar or $H_2$ ambient gas during the RTA process, and the modified surface energy was evaluated through water contact angle test. A smaller mean diameter of Ag nanoparticles was obtained under $H_2$ gas at RTA, compared to that under Ar, from the same thickness of Ag thin film. This result was observed by SEM and summarized by statistical analysis. The mechanism of this result was determined by the surface energy change caused by the chemical reaction between the Si substrate and $H_2$. The change of the surface energy affected on uniformity in the MCE process using Ag nanoparticles as catalyst. The nanoparticles formed under ambient Ar, having high surface energy, randomly moved in the lateral direction on the substrate even though the etching solution consisting of 10 % HF and 0.12 % $H_2O_2$ was cooled down to $-20^{\circ}C$ to minimize thermal energy, which could act as the driving force of movement. On the other hand, the nanoparticles thermally treated under ambient $H_2$ had low surface energy as the surface of the Si substrate reacted with $H_2$. That's why the Ag nanoparticles could keep their pattern and vertically etch the Si substrate during MCE.