• 한국콘텐츠학회논문지
• /
• 제8권4호
• /
• pp.48-54
• /
• 2008

본 논문에서는 데이터 스트림 환경에서 윈도우 기반 연산자를 대상으로 메모리와 연산 비용의 상대적인 이해득실 관계를 분석한다. 이를 위하여 기본적인 연산자 네트워크 구성 요소를 식별하고, 윈도우 메모리의 재배치를 통한 메모리 소요량의 감소 효과와, 이로 인한 추가적인 연산 비용의 규모를 산정하는 비용 모델을 수립한다. 이러한 비용 모델을 통해 윈도우 메모리의 재배치의 효용성을 확인하고, 이러한 접근 방법을 데이터 스트림 질의의 실행 계획 개선을 위해 효과적으로 활용할 수 있는 방법을 모색한다. 이를 통해 데이터 스트림 환경에서 질의 처리 및 최적화의 적용 영역을 확장시키고, 윈도우 메모리 재배치를 통한 질의최적화를 위한 비용 산정 모델의 토대를 제공한다.

• 한국전기전자재료학회논문지
• /
• 제36권3호
• /
• pp.226-232
• /
• 2023

As a potential alternative to flash memory, HfO₂/Al₂O₃ stacks appear to be a viable option as charge capture layers in charge trapping memories. The paper undertakes a review of HfO₂/Al₂O₃ stacks as charge trapping layers, with a focus on comparing the number, thickness, and post-deposition heat treatment and γ-ray and white x-ray treatment of such stacks. Compared to a single HfO₂ layer, the memory window of the 5-layered stack increased by 152.4% after O₂ annealing at ±12 V. The memory window enlarged with the increase in number of layers in the stack and the increase in the Al/Hf content in the stack. Furthermore, our comparison of the treatment of HfO₂/Al₂O₃ stacks with varying annealing temperatures revealed that an increased annealing temperature resulted in a wider storage window. The samples treated with O₂ and subjected to various γ radiation intensities displayed superior resistance. and the memory window increased to 12.6 V at ±16 V for 100 kGy radiation intensity compared to the untreated samples. It has also been established that increasing doses of white x-rays induced a greater number of deep defects. The optimization of stacking layers along with post-deposition treatment condition can play significant role in extending the memory window.

• 조명전기설비학회논문지
• /
• 제16권6호
• /
• pp.1-6
• /
• 2002

움직이는 창과 이중 초점 렌즈를 이용한 프랙탈-공간 다중화 기법의 홀로그래픽 메모리 시스템을 제안하였다. 이 시스템은 기존의 움직이는 창을 이용한 홀로그래픽 메모리 시스템의, 수직 방향으로 인접한 움직이는 창의 열에 의한 누화를 제거할 수 있으며, 이를 광학적 실험을 통해 그 가능성을 입증하였다.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 1999년도 추계종합학술대회 논문집
• /
• pp.921-924
• /
• 1999

By controlling the pixels of a liquid crystal display (LCD) electronically, we fabricated a real-time moving window on a LCD, through which light passes. Using the moving window and hi-focusing lens, we suggested a non-mechanical spatio-angular multiplexed holographic memory system and demonstrated its feasibility through optical experiments. The principle of the proposed method and optical experimental results are also presented.

• 한국재료학회지
• /
• 제19권9호
• /
• pp.462-467
• /
• 2009

The Charge Trap Flash (CTF) memory device is a replacement candidate for the NAND Flash device. In this study, Pt/$Al_2O_3/La_2O_3/SiO_2$/Si multilayer structures with lanthanum oxide charge trap layers were fabricated for nonvolatile memory device applications. Aluminum oxide films were used as blocking oxides for low power consumption in program/erase operations and reduced charge transports through blocking oxide layers. The thicknesses of $SiO_2$ were from 30 $\AA$ to 50 $\AA$. From the C-V measurement, the largest memory window of 1.3V was obtained in the 40 $\AA$ tunnel oxide specimen, and the 50 $\AA$ tunnel oxide specimen showed the smallest memory window. In the cycling test for reliability, the 30 $\AA$ tunnel oxide sample showed an abrupt memory window reduction due to a high electric field of 9$\sim$10MV/cm through the tunnel oxide while the other samples showed less than a 10% loss of memory window for $10^4$ cycles of program/erase operation. The I-V measurement data of the capacitor structures indicated leakage current values in the order of $10^{-4}A/cm^2$ at 1V. These values are small enough to be used in nonvolatile memory devices, and the sample with tunnel oxide formed at $850^{\circ}C$ showed superior memory characteristics compared to the sample with $750^{\circ}C$ tunnel oxide due to higher concentration of trap sites at the interface region originating from the rough interface.

• 한국진공학회지
• /
• 제7권3호
• /
• pp.195-200
• /
• 1998

본 연구에서는 강유전체 박막의 게이트 산화물로 사용한 $Pt/SrBi_2Ta_2O_9(SBT)/CeO_2/Si(MFS)$와 Pt/SBT/Si(MFS) 구조의 결정 구조 및 전기적 성질 의 차이를 연구하였다. XRD 및 SEM 측정 결과 SBT/$CeO_2$/Si박막은 약5nm정도의 $SiO_2$층 이 형성되었고 비교적 평탄한 계면의 미세구조를 가지는 반면, SBT/Si는 각각 약6nm와 7nm정도의 $SiO_2$층과 비정질 중간상층이 형성되었음을 알 수 있다. 즉 CeO2 박막을 완충층 으로 사용함으로써 SBT박막과 Si기판의 상호 반응을 적절히 억제할 수 있음을 확인하였다. Pt/SBT/$CeO_2/Pt/SiO_2$/와 Pt/SBT/Pt/$SiO_2$/Si구조에서 Polarization-Electric field(P-E) 특 성을 비교해 본 결과 CeO2박막의 첨가에 따라 잔류분극값은 감소하였고 항전계값은 증가하 였다. MFIS구조에서 memory window값은 항전계값과 직접적 관련이 있으므로 이러한 항 전계값의 증가는 MFIS구조에서의 memory window값이 증가할 수 있음을 나타낸다. Pt-SBT(140nm)/$CeO_2$(25nm)/Si구조에서 Capacitance-Voltage(C-V) 측정 결과로부터 동작 전압 4-6V에서 memory wondows가 1-2V정도로 나타났다. SBT박막의 두께가 증가할수록 memory window값은 증가하였는데 memory wondows가 1-2V정도로 나타났다. SBT박막의 두께가 증가할수록 memory window값은 증가하였는데 이는 SBT박막에 걸리는 전압강하가 증가하기 때문인 것으로 생각되어진다. Pt/SBT/$CeO_2$/Si의 누설전류는 10-8A/cm2정도였고 Pt/SBT/Si 구조에서는 약10-6A/cm2정도로 약간 높은 값을 나타내었다.

• Transactions on Electrical and Electronic Materials
• /
• 제15권1호
• /
• pp.16-19
• /
• 2014

Charge trapping nonvolatile memory capacitors with $ZrO_2$ as charge trapping layer were fabricated, and the effects of post annealing atmosphere ($NH_3$ and $N_2$) on their memory storage characteristics were investigated. It was found that the memory windows were improved, after annealing treatment. The memory capacitor after $NH_3$ annealing treatment exhibited the best electrical characteristics, with a 6.8 V memory window, a lower charge loss ~22.3% up to ten years, even at $150^{\circ}C$, and excellent endurance (1.5% memory window degradation). The results are attributed to deep level bulk charge traps, induced by using $NH_3$ annealing.

• 한국전기전자재료학회논문지
• /
• 제16권10호
• /
• pp.865-870
• /
• 2003

The MFIS (Metal-Ferroelectric-Insulator-Semiconductor) capacitors were fabricated using a metalorganic decomposition method. Thin layers of CeO$_2$ were deposited as a buffer layer on Si substrate and BLT thin films were used as a ferroelectric layer. The electrical and structural properties of the MFIS structure were investigated. X -ray diffraction was used to determine the phase of the BLT thin films and the quality of the CeO$_2$ layer. The morphology of films and the interface structures of the BLT and the CeO$_2$ layers were investigated by scanning electron microscopy. The width of the memory window in the C-V curves for the MFIS structure is 2.82 V. The experimental results show that the BLT-based MFIS structure is suitable for non-volatile memory FETs with large memory window.

• 한국산학기술학회:학술대회논문집
• /
• 한국산학기술학회 2000년도 추계학술대회
• /
• pp.214-217
• /
• 2000

We suggested a new non-mechanical angular multiplexed holographic memory system using a moving window. The feasibility of the proposed method was demonstrated through optical experiments and its crosstalk noise analysis were also presented

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2008년도 하계종합학술대회
• /
• pp.403-404
• /
• 2008

In this paper, a new 4-way search window is developed for H.264 Motion Estimation(ME) to improve the memory bandwidth. The proposed 4-way(up, down, left, right) search window could improve the reuse of overlapped window data to reduce the redundancy access factor by 1.4, though the 1/3-way search window requires $7.7{\sim}11$ times of data retrieval redundantly. In experiments, the new implementation of 4-way search window on Altera Stratix-III could deal with CIF ($352{\times}288$) video of 3 reference frame, $48{\times}48$ search area and $16{\times}16$ macroblock by 30fps real time at 55.2MHz.