• Title/Summary/Keyword: Memory window

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Cost Analysis of Window Memory Relocation for Data Stream Processing (데이터 스트림 처리를 위한 윈도우 메모리 재배치의 비용 분석)

  • Lee, Sang-Don
    • The Journal of the Korea Contents Association
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    • v.8 no.4
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    • pp.48-54
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    • 2008
  • This paper analyzes cost tradeoffs between memory usage and computation for window-based operators in data stream environments. It identifies generic operator network constructs, and sets up a cost model for the estimation of the expected memory reduction and the computation overheads when window memory relocations are applied to each operator network construct. This cost model helps to identify the utility of window memory relocations. It also helps to apply window memory relocation to improve a query execution plan to save memory usage. The proposed approach contributes to expand the scope of query processing and optimization in data stream environments. It also provides a basis to develop a cost estimation model for the query optimization using window memory relocations.

Improvement of Storage Performance by HfO2/Al2O3 Stacks as Charge Trapping Layer for Flash Memory- A Brief Review

  • Fucheng Wang;Simpy Sanyal;Jiwon Choi;Jaewoong Cho;Yifan Hu;Xinyi Fan;Suresh Kumar Dhungel;Junsin Yi
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.36 no.3
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    • pp.226-232
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    • 2023
  • As a potential alternative to flash memory, HfO2/Al2O3 stacks appear to be a viable option as charge capture layers in charge trapping memories. The paper undertakes a review of HfO2/Al2O3 stacks as charge trapping layers, with a focus on comparing the number, thickness, and post-deposition heat treatment and γ-ray and white x-ray treatment of such stacks. Compared to a single HfO2 layer, the memory window of the 5-layered stack increased by 152.4% after O2 annealing at ±12 V. The memory window enlarged with the increase in number of layers in the stack and the increase in the Al/Hf content in the stack. Furthermore, our comparison of the treatment of HfO2/Al2O3 stacks with varying annealing temperatures revealed that an increased annealing temperature resulted in a wider storage window. The samples treated with O2 and subjected to various γ radiation intensities displayed superior resistance. and the memory window increased to 12.6 V at ±16 V for 100 kGy radiation intensity compared to the untreated samples. It has also been established that increasing doses of white x-rays induced a greater number of deep defects. The optimization of stacking layers along with post-deposition treatment condition can play significant role in extending the memory window.

A Novel Fractal-Space Multiplexing using Moving Window and Double-Focusing Lens (움직이는 창과 이중 초점 렌즈를 이용한 프랙탈-공간 다중화 기법)

  • Kim, Soo-Gil
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.16 no.6
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    • pp.1-6
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    • 2002
  • We propose a novel fractal-space multiplexing holographic memory system using moving window and double-focusing lens, which can eliminate crosstalk due to two neighboring moving window rows in the vertical direction of the conventional moving window holographic memory system, and demonstrated its feasibility through optical experiments.

Spatio-angular multiplexed optical memory system using LCD moving window and hi-focus lens (LCD Moving Window와 이중초점 렌즈를 이용한 각 .공간 다중화 광메모리 시스템)

  • 김규태;황진환;김수길;김은수
    • Proceedings of the IEEK Conference
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    • 1999.11a
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    • pp.921-924
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    • 1999
  • By controlling the pixels of a liquid crystal display (LCD) electronically, we fabricated a real-time moving window on a LCD, through which light passes. Using the moving window and hi-focusing lens, we suggested a non-mechanical spatio-angular multiplexed holographic memory system and demonstrated its feasibility through optical experiments. The principle of the proposed method and optical experimental results are also presented.

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Memory Characteristics of Al2O3/La2O3/SiO2 Multi-Layer Structures for Charge Trap Flash Devices (전하 포획 플래시 소자를 위한 Al2O3/La2O3/SiO2 다층 박막 구조의 메모리 특성)

  • Cha, Seung-Yong;Kim, Hyo-June;Choi, Doo-Jin
    • Korean Journal of Materials Research
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    • v.19 no.9
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    • pp.462-467
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    • 2009
  • The Charge Trap Flash (CTF) memory device is a replacement candidate for the NAND Flash device. In this study, Pt/$Al_2O_3/La_2O_3/SiO_2$/Si multilayer structures with lanthanum oxide charge trap layers were fabricated for nonvolatile memory device applications. Aluminum oxide films were used as blocking oxides for low power consumption in program/erase operations and reduced charge transports through blocking oxide layers. The thicknesses of $SiO_2$ were from 30 $\AA$ to 50 $\AA$. From the C-V measurement, the largest memory window of 1.3V was obtained in the 40 $\AA$ tunnel oxide specimen, and the 50 $\AA$ tunnel oxide specimen showed the smallest memory window. In the cycling test for reliability, the 30 $\AA$ tunnel oxide sample showed an abrupt memory window reduction due to a high electric field of 9$\sim$10MV/cm through the tunnel oxide while the other samples showed less than a 10% loss of memory window for $10^4$ cycles of program/erase operation. The I-V measurement data of the capacitor structures indicated leakage current values in the order of $10^{-4}A/cm^2$ at 1V. These values are small enough to be used in nonvolatile memory devices, and the sample with tunnel oxide formed at $850^{\circ}C$ showed superior memory characteristics compared to the sample with $750^{\circ}C$ tunnel oxide due to higher concentration of trap sites at the interface region originating from the rough interface.

Characteristics of the Crystal Structure and Electrical Properties of Metal/Ferroelectric/Insulator/Semiconductor (Metal/Ferroelectric/Insulator/Semiconductor 구조의 결정 구조 및 전기적 특성에 관한 연구)

  • 신동석;최훈상;최인훈;이호녕;김용태
    • Journal of the Korean Vacuum Society
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    • v.7 no.3
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    • pp.195-200
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    • 1998
  • We have investigated the crystal structure and electrical properties of Pt/SBT/$CeO_2$/Si(MFIS) and Pt/SBT/Si(MFS) structures for the gate oxide of ferroelectric memory. XRD spectra and SEM showed that the SBT film of SBT/$CeO_2$/Si structure had larger grain than that of SBT/Si structure. Furthermore HRTEM showed that SBT/$CeO_2$/Si had 5 nm thick $SiO_2$layer and very smooth interface but SBT/Si had 6nm thick $SiO_2$layer and 7nm thick amorphous intermediate interface. Therefore, $CeO_2$film between SBT film and Si substrate is confirmed as a good candidate for a diffusion barrier. The remanent polarization decreased and coercive voltage increased in Pt/SBT/$CeO_2/Pt/SiO_2$/Si structure. This effect may increase memory window of MFIS structure directly related to the coercive voltage. From the capacitance-voltage characteristics, the memory of Pt/SBT(140 nm)/$CeO_2$(25 nm)/Si structure were in the range of 1~2 V at the applied voltage of 4~6 V. The memory window increased with the thickness of SBT film. These results may be due to voltage applied at SBT films. The leakage currents of Pt/SBT/$CeO_2$/Si and Pt/SBT/Si were $ 10^8A/\textrm{cm}^2$ and $ 10^6 A/\textrm{cm}^2$, respectively.

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Improved Memory Characteristics by NH3 Post Annealing for ZrO2 Based Charge Trapping Nonvolatile Memory

  • Tang, Zhenjie;Zhao, Dongqiu;Li, Rong;Zhu, Xinhua
    • Transactions on Electrical and Electronic Materials
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    • v.15 no.1
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    • pp.16-19
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    • 2014
  • Charge trapping nonvolatile memory capacitors with $ZrO_2$ as charge trapping layer were fabricated, and the effects of post annealing atmosphere ($NH_3$ and $N_2$) on their memory storage characteristics were investigated. It was found that the memory windows were improved, after annealing treatment. The memory capacitor after $NH_3$ annealing treatment exhibited the best electrical characteristics, with a 6.8 V memory window, a lower charge loss ~22.3% up to ten years, even at $150^{\circ}C$, and excellent endurance (1.5% memory window degradation). The results are attributed to deep level bulk charge traps, induced by using $NH_3$ annealing.

Characterization of Pt/BLT/CeO2/Si Structures using CeO2 Buffer Layer (CeO2Buffer Layer를 이용한 Pt/BLT/CeO2/Si 구조의 특성)

  • 이정미;김경태;김창일
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.10
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    • pp.865-870
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    • 2003
  • The MFIS (Metal-Ferroelectric-Insulator-Semiconductor) capacitors were fabricated using a metalorganic decomposition method. Thin layers of CeO$_2$ were deposited as a buffer layer on Si substrate and BLT thin films were used as a ferroelectric layer. The electrical and structural properties of the MFIS structure were investigated. X -ray diffraction was used to determine the phase of the BLT thin films and the quality of the CeO$_2$ layer. The morphology of films and the interface structures of the BLT and the CeO$_2$ layers were investigated by scanning electron microscopy. The width of the memory window in the C-V curves for the MFIS structure is 2.82 V. The experimental results show that the BLT-based MFIS structure is suitable for non-volatile memory FETs with large memory window.

A new 4-way search window for improve memory bandwidth by 2-D data reuse for ME in H.264 (H.264의 움직임추정에서 2차원 데이터재사용으로 메모리대역폭을 개선하기 위한 4방향 검색윈도우)

  • Lee, Kyung-Ho;Lee, Seng-Kwon;Kong, Jin-Hyeung
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.403-404
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    • 2008
  • In this paper, a new 4-way search window is developed for H.264 Motion Estimation(ME) to improve the memory bandwidth. The proposed 4-way(up, down, left, right) search window could improve the reuse of overlapped window data to reduce the redundancy access factor by 1.4, though the 1/3-way search window requires $7.7{\sim}11$ times of data retrieval redundantly. In experiments, the new implementation of 4-way search window on Altera Stratix-III could deal with CIF ($352{\times}288$) video of 3 reference frame, $48{\times}48$ search area and $16{\times}16$ macroblock by 30fps real time at 55.2MHz.

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