• IEMEK Journal of Embedded Systems and Applications
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• v.11 no.6
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• pp.335-341
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• 2016

As information technology advances rapidly, various smart devices are becoming an essential element in our lives. Smart devices are providing services to users through applications up on the operating system. Operating systems have a variety of rules, such as scheduling applications and controlling hardwares. Among those rules, it is significant to protect private information in the information-oriented society. Therefore, isolation task, that makes certain memory space separated for each application, should highly be guaranteed. However, modern operating system offers the function to access the memory space from other applications for the sake of debugging. If this ability is misused, private information can be leaked or modified. Even though the access authority to memory is strictly managed, there exist cases found exploited. In this paper, we analyze the problems of the function provided in the Android environment that is the most popular and opened operating system. Also, we discuss how to avoid such kind of problems and verify with experiments.

• 한국정보통신설비학회:학술대회논문집
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• 2008.08a
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• pp.218-222
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• 2008

RF power amplifier requires linearization in order to reduce adjacent channel interference. And most of the existing linearization algorithms assume that a PA has memory-less nonlinearity. But for the wider bandwidth signal, the memory effect of PA cannot be ignored. This paper investigates digital pre-distortion by use of a memory polynomial model which compensates for amplifier nonlinearity and memory effect. The look-up table based implementation scheme is used to reduce the computational complexity of the pre-distortion block. The linearization performance is demonstrated on wideband CDMA signal and class AB high power amplifier.

• Proceedings of the IEEK Conference
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• 2003.07d
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• pp.1335-1338
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• 2003

Fixed-size memory allocation is one of the most promising way to avoid external fragmentation in dynamic memory allocation problem. This paper presents an experimental result of applying the fixed- size memory allocation strategy to Java virtual machine for embedded system. The result says that although this strategy induces another memory utilization problem caused by internal fragmentation, the effect is not very considerable and this strategy is well-suited for embedded Java system. The experiment has been performed in a real embedded Java system called the simpleRTJ.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.1
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• pp.115-122
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• 2004

This paper describe the implementation or the boot loader for the boot system using of memory card. This boot roader consist of the system initialization, CF card checking, CF memory card checking, file system and the program relocator. This boot loader increase the system stability with program consistency checking algorithm in the read phase from the CF memory card. And this system have the compatibility in CF memory card file system, so system manufacturing productivity increase.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1997.10a
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• pp.596-599
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• 1997

In this study, the flow control system with shape memory alloy in jet engine inlet was suggested to adjust the shock boundary layer interact~on for supersonic flight system. It consisted of the flap with shape memory alloy, spar with steel, and fixing device with aluminum alloy. The advantages of itself are a simple configuration, a passive air circulation by using the flap deflection due to pressure difference, and no need to be required the auxiliary devices. Finite element analysis was conducted to predict the thenno-mechanical behavlor of the flap system with shape memory alloy. The user-defined subroutine UMAT was implemented with ABAQUS to accon~modate the thermo-mechanical constitutive relation of shape memory alloy.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.5
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• pp.539-548
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• 2015

In this paper, shared memory feature was developed in multi-core system with different OS for different processor-specific bus, while conducting an experiment on shared memory feature between the two processors based on embedded Linux system. For the purpose of developing shared memory in dual bus structure, memory controller was used, while managing shared memory segment through list data structure. For AMP multi-core test, Linux OS was installed in 2 processor cores. In addition, it verified the creation and use of shared memory by using kernel module implemented to test shared memory.

• Smart Media Journal
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• v.4 no.3
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• pp.16-23
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• 2015

As the IT technology advances, data processing system is required to handle and process large amounts of data. However, the existing On-Disk system has limit to process data which increase rapidly. For that reason, the In-Memory system is being used which saves and manages data on the fast memory not saving data into hard disk. Although it has fast processing capability, it is necessary to use the fault tolerance techniques in the In-Memory system because it has a risk of data loss due to volatility which is one of the memory characteristics. These fault tolerance techniques lead to performance degradation of In-Memory system. In this paper, we classify the data into Hot and Cold data in consideration of the data usage characteristics in the In-Memory system and propose compound backup technique to ensure data persistence. The proposed technique increases the persistence and improves performance degradation.

• The KIPS Transactions:PartA
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• v.14A no.1 s.105
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• pp.39-46
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• 2007

Recently flash memory is widely accepted as a storage devise of embedded systems for portability and performance reasons. Flash memory has many distinguishing features compared to legacy magnetic disks. Especially, a file system for flash memory usually assumes the form of log-structured file system and it employs garbage collector accordingly. Since the garbage collector can greatly affect the performance of file system, it should be designed carefully considering flash memory features. In this paper, we suggest a new garbage collector for existing JFFS2 (Journaling Flash File System II) file system. By extensive performance evaluation, we show that the proposed garbage collector achieves improved performance in terms of flash memory consumption rate, increased flash memory life time, and improved wear-leveling.

• ETRI Journal
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• v.44 no.3
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• pp.450-461
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• 2022

The Gen-Z protocol is a memory semantic protocol between the memory and CPU used in computer architectures with large memory pools. This study presents the implementation of the Gen-Z hardware system configured using Gen-Z specification 1.0 and reports its performance. A hardware prototype of a DDR4 Gen-Z memory pool with an optimized character, a block device driver, and a file system for the Gen-Z hardware was designed. The Gen-Z IP was targeted to the FPGA, and a 512 GB Gen-Z memory pool was configured on an ×86 server. In the experiments, the latency and throughput of the Gen-Z memory were measured and compared with those of the local memory, SATA SSD, and NVMe using character or block device interfaces. The Gen-Z hardware exhibited superior throughput and latency performance compared with SATA SSD and NVMe at block sizes under 4 kB. The MySQL and File IO benchmark of Gen-Z showed good write performance in all block sizes and threads. Besides, it showed low latency in RocksDB's fillseq dbbench using the ext4 direct access filesystem.

• Journal of Korea Multimedia Society
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• v.19 no.7
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• pp.1179-1187
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• 2016

Through the rapid development of latest hardware technology, high performance as well as miniaturized size is the essentials of embedded system to meet various requirements from the society. It raises possibilities of genuine realization of IoT environment whose size and battery must be considered. However, the limitation of battery persistency and capacity restricts the long battery life time for guaranteeing real-time system. To maximize battery life time, low power technology which lowers the power consumption should be highly required. Previous researches mostly highlighted improving one single type of memory to increase ones efficiency. In this paper, reversely, considering multiple memories to optimize whole memory system is the following step for the efficient low power embedded system. Regarding to that fact, this paper suggests the study of volatile memory, whose capacity is relatively smaller but much low-powered, and non-volatile memory, which do not consume any standby power to keep data, to maximize the efficiency of the system. By executing function in specific memories, non-volatile and volatile memory, the quantitative analysis of power consumption is progressed. In spite of the opportunity cost of all of theses extra works to locate function in volatile memory, higher efficiencies of both power and energy are clearly identified compared to operating single non-volatile memory.