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http://dx.doi.org/10.4218/etrij.2021-0091

Gen-Z memory pool system implementation and performance measurement  

Kwon, Won-ok (Department of Future Computing Research Division, Electronics and Telecommunications Research Institute)
Sok, Song-Woo (Department of Future Computing Research Division, Electronics and Telecommunications Research Institute)
Park, Chan-ho (Department of Future Computing Research Division, Electronics and Telecommunications Research Institute)
Oh, Myeong-Hoon (Department of Computer Engineering, Honam University)
Hong, Seokbin (Department of Computer Software, University of Science and Technology)
Publication Information
ETRI Journal / v.44, no.3, 2022 , pp. 450-461 More about this Journal
Abstract
The Gen-Z protocol is a memory semantic protocol between the memory and CPU used in computer architectures with large memory pools. This study presents the implementation of the Gen-Z hardware system configured using Gen-Z specification 1.0 and reports its performance. A hardware prototype of a DDR4 Gen-Z memory pool with an optimized character, a block device driver, and a file system for the Gen-Z hardware was designed. The Gen-Z IP was targeted to the FPGA, and a 512 GB Gen-Z memory pool was configured on an ×86 server. In the experiments, the latency and throughput of the Gen-Z memory were measured and compared with those of the local memory, SATA SSD, and NVMe using character or block device interfaces. The Gen-Z hardware exhibited superior throughput and latency performance compared with SATA SSD and NVMe at block sizes under 4 kB. The MySQL and File IO benchmark of Gen-Z showed good write performance in all block sizes and threads. Besides, it showed low latency in RocksDB's fillseq dbbench using the ext4 direct access filesystem.
Keywords
CXL; Gen-Z; memory centric computing; memory pool; PMDK;
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Times Cited By KSCI : 2  (Citation Analysis)
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