• Journal of Internet Computing and Services
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• v.6 no.1
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• pp.65-72
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• 2005

Flash memories are one of best media to support portable computers in mobile computing environment. The features of non-volatility, low power consumption. and fast access time for read operations are sufficient grounds to support flash memory as major database storage components of portable computers. However. we need to Improve traditional transaction management scheme due to the relatively slow characteristics of flash operation as compared to RAM memory. In order to achieve this goal. we devise a new scheme called flash-aware transaction management (FATM). FATM improves transaction performance by exploiting SRAM and W-Cache, We also propose a simulation model to show the performance of FATM. Based on the results of the performance evaluation, we conclude that FATM scheme outperforms the traditional scheme.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.23 no.4
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• pp.53-58
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• 2023

As smartphones increasingly support the execution of various applications, the function of virtual memory swapping is becoming important. However, unlike traditional computer systems, mobile platforms do not basically support swapping. This is because swapping results in frequent writes to flash memory, which may degrade the performance of smartphone's storage significantly. To cope with this situation, this paper suggests two multi-swap architectures, hierarchical swapping and hybrid swapping, and compares their performance quantitatively. Specifically, this paper shows that hybrid swapping with the consideration of single-access data can reduce swapping traffic to flash memory, and improve the performance compared to traditional swapping.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.05a
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• pp.522-524
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• 2015

A USB memory stick became common for secondary storage Unit.. But USB memory stick has critical problems as well. Such as personal information data leakage due to easy loss of the portable device. Therefore, User increased Repurchases of USB memory stick, and damage case of personal and company information data leakage increased. In this study, to prevent such loss and stolen, we propose Smart USB memory stick based on Bluetooth. Smart USB memory stick support the security and prevent the loss.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.313-315
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• 2013

Hand-held devices such as smart phones exploit flash memory based storages to store data for processing jobs. Since the flash memory, non-volatile memory, is able to store mass data, it is required to use the index for processing queries. However, the flash memory has the shortcomings that it does not support the overwrite operation and its write operation is very slow. In this paper, we build the fixed grid file, one of the multi-dimensional spatial index, on a flash memory and evaluate the performance test.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.429-432
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• 2000

The new MPEG-4 video coding standard enables content-based functionalities. In order to support the philosophy of the MPEG-4 visual standard, each frame of video sequences should be represented in terms of video object planes (VOP’s). In other words, video objects to be encoded in still pictures or video sequences should be prepared before the encoding process starts. Therefore, it requires a prior decomposition of sequences into VOP’s so that each VOP represents a moving object. A parallel processing system is required an automatic segmentation to be processed in real-time, because an automatic segmentation is time consuming. This paper addresses the parallel processing: system for an automatic segmentation for separating moving object from the background in image sequences. The proposed parallel processing system comprises of processing elements (PE’s) and a multi-access memory system (MAMS). Multi-access memory system is a memory controller to perform parallel memory access with the variety of types: horizontal, vertical, and block access way. In order to realize these ways, a multi-access memory system consists of a memory module selection module, data routing modules, and an address calculation and routing module. The proposed system is simulated and evaluated by the CADENCE Verilog-XL hardware simulation package.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.2
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• pp.275-282
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• 2015

Since a NAND-flash memory is able to keep data during electricity-off and has small cost to store data per bytes, it is widely used on hand-held devices. It is necessary to use an index in order to process mass data effectively on the flash memory. However, since the flash memory requires high cost for a write operation and does not support an overwrite operation, it is possible to reduce the performance of the index when the disk based index is exploited. In this paper, we implement the fixed grid file index and evaluate the performance of the index on various conditions. To do this, we measure the average processing time by the ratio of query operations and update operations. We also the compare the processing times of the flash memory with those of the magnetic disk.

• Proceedings of the IEEK Conference
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• 2009.05a
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• pp.240-242
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• 2009

Flash memories are one of best media to support future computer's storages. However, we need to improve traditional data management scheme due to the relatively slow characteristics of flash operation of SSD. Due to the unique characteristics of flash media and hard disk, the efficiency of I/O processing is severely reduced without special treatment, especially in the presence of heavy workload or bulk data copy. In this respect, we need to design and develop efficient hybrid-RAID storage system.

• Proceedings of the IEEK Conference
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• 2003.07a
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• pp.505-508
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• 2003

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.8
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• pp.55-62
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• 2012

The development of memory design and process technology enabled the production of high density memory. As the weight of embedded memory within aggregate Systems-On-Chips(SoC) gradually increases to 80-90% of the number of total transistors, the importance of testing embedded dual-port memories in SoC increases. This paper proposes a new micro-code based programmable memory Built-In Self-Test(PMBIST) architecture for dual-port memories that support test various test algorithms. In addition, various test algorithms including March based algorithms and dual-port memory test algorithms are efficiently programmed through the proposed algorithm instruction set. This PMBIST has an optimized hardware overhead, since test algorithm can be implemented with the minimum bits by the optimized algorithm instructions.

• Korean Journal of Cognitive Science
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• v.9 no.1
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• pp.47-60
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• 1998

The study was designed to investigate implicit and explicit memory effec representations of bilinguals. Hierarchical model of bilingual information processing word naming and translation tasks in the context of semantically categorized or rar Experiments 1 and 2, bilinguals first viewed stimulus words and performed naming or tr then implicit and explicit memory tasks. In experiment I, word recognition times(exp were significantly faster for semantic category condition than random category condi naming task and lexical decision taskOmplicit memory task)showed no difference in e experiment 2, naming task and exlicit memory task showed categorization effect but fOWE a and implcit memory task showed no categorization effect. These findings support the which posits that memory representations of bilinguals are composed of two independer a and one common conceptual store.