• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.9 no.3
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• pp.19-24
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• 2009

When a dynamic method is applied at the time of occurrence of an client's connection request for most of the online gaming server engine, the gaming server is processing a session connection, it's initialization. Yet, such a method will cause a lot of loading and bottle-neck in the gaming server at the same time. Therefore we propose the object polling scheme to minimizes a memory fragmentation and loading of the initialization on the client using a static allocation method for an efficient On-lin gaming serverin this paper. We implement the gaming server applying to our proposed scheme, and we show an improvement in our proposed scheme by performance analysis in this paper.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.10a
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• pp.300-303
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• 2015

Digital imaging process has been put to practical use in various application sectors due to a rapid advancement such as memory devices, etc. However, noises are being generated due to various reasons during the image processing and a variety of methods are being studied in order to eliminate these noises. Generally, images are damaged due to a mixed noise having different characteristics. In this paper, a filter algorithm which switches according to the noise types was proposed in order to mitigate the influence of mixed noise included in the image. And using the PSNR as the standard for objective decision making of the improvement effect, it was compared with the existing methods.

• Journal of Information Technology Applications and Management
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• v.26 no.4
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• pp.1-18
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• 2019

The virtual reality (VR) is an immerging technology used in the serious games industry to treat psychological disorders like dementia. We created a system named as Virtual Reality Home (VRH) for the elderly who lived with Alzheimer's disease (or other form of dementia) and cognitive impairment using virtual reality technology. The purpose of our study is to measure the long-time immersion and retention of VRH on the moods and apathy, enhancement in physical and brain stimulation as well as a decision making with peoples of dementia and explore the experience of aged care home staff's member. The VRH shows a positive impact on the elderly participants and staff members. During the VRH experience, excitement and a great level of alertness were observed among the participants but few of them were feeling anxiety. Furthermore, we observed the improvement in physical, memory and brain stimulation, but the participants have a low focus on decision making because they wanted to explore all interactable objects in the VRH. This study suggests that the VR may have the potential to improve the quality of life, and these results can assist to expand the future development in the enhancement of efficiency of people with dementia.

• Journal of the Korea Society of Computer and Information
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• v.18 no.10
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• pp.13-21
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• 2013

Recently, although the number of cores on a chip multi-processor increases, multi-programming or multi-threaded programming techniques to utilize the whole cores are still insufficient. Therefore, there inevitably exist some idle cores which are not working. This results in a waste of the caches, so-called idle caches which are dedicated to those idle cores. In this research, we propose amethodology to exploit idle caches effectively as victimcaches of on-chip memory resource. In simulation results, we have achieved 19.4%and 10.2%IPC improvement in 4-core and 16-core respectively, compared to previous technique.

• Journal of Communications and Networks
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• v.18 no.3
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• pp.493-501
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• 2016

In-network storage is an effective technique for avoiding network congestion and reducing power consumption in continuous data collection in wireless sensor networks. In recent years, network coding based storage design has been proposed as a means to achieving ubiquitous access that permits any query to be satisfied by a few random (nearby) storage nodes. To maintain data consistency in continuous data collection applications, the readings of a sensor over time must be sent to the same set of storage nodes. In this paper, we present an efficient approach to updating data at storage nodes to maintain data consistency at the storage nodes without decoding out the old data and re-encoding with new data. We studied a transmission strategy that identifies a set of storage nodes for each source sensor that minimizes the transmission cost and achieves ubiquitous access by transmitting sparsely using the sparse matrix theory. We demonstrate that the problem of minimizing the cost of transmission with coding is NP-hard. We present an approximation algorithm based on regarding every storage node with memory size B as B tiny nodes that can store only one packet. We analyzed the approximation ratio of the proposed approximation solution, and compared the performance of the proposed coding approach with other coding schemes presented in the literature. The simulation results confirm that significant performance improvement can be achieved with the proposed transmission strategy.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.2 no.1
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• pp.117-124
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• 1998

As window sized increases, the throughput input-buffered packet switch with a window scheme improves on random traffic condition. However, the improvement diminishes quickly under bursty traffic. In this paper, we propose Burst Head Addressable FIFO mechanism and memory structure having search capability in unit of burst header to compensate the sensitiveness of the windowed scheme to bursty traffic. The performance of a input-buffered switch using the proposed Burst Header Addressable FIFO input buffer was analyzed using computer simulations. The maximum throughput of the conventional FIFO scheme approaches an asymptotic value 0.5 as mean burst length increases. The maximum throughput of the proposed scheme is greater than that of the conventional scheme for any mean burst length and window size.

• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1448-1449
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• 2006

Pb(Zr,Ti)$O_3$ is one of the most attractive ferroelectric materials for realizing the FeRAM due to its higher remanant polarization and the ability to withstand higher coercive fields. Generally, the ferroelectric materials were patterned by a plasma etching process for high-density FeRAM. The applicable possibility of CMP process to pattern Pb(Zr,Ti)$O_3$ instead of plasma etching process was investigated in our previous study for improvement of an angled sidewall which prevents the densification of ferroelectric memory and is apt to receive the plasma damage. Our previous study showed that good removal rate with the excellent surface roughness compared to plasma etching process were obtained by CMP process for the patterning of Pb(Zr,Ti)$O_3$. The suitable selectivity to TEOS without any damage to the structural property of Pb(Zr,Ti)$O_3$ was also guaranteed. In this study, the removal mechanism of $Pb_{1.1}(Zr_{0.52}Ti_{0.48})O_3$ coated by sol-gel method was investigated. Surface analysis of polished specimens at the best and worst conditions was carried out by XPS.

• Proceedings of the KIEE Conference
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• 2005.07c
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• pp.1881-1883
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• 2005

In this study, PZT thin films were fabricated using sol-gel Processing onto $Si/SiO_2/Ti/Pt$ substrates. PZT sol with different Zr/Ti ratio(20/80, 30/70, 40/60, 52/48) were prepared, respectively. The films were fabricated by using the spin-coating method on substrates. The films were heat treated at $450^{\circ}C$, $650^{\circ}C$ by rapid thermal annealing(RTA). The preferred orientation of the PZT thin films were observed by X-ray diffraction(XRD), and Scanning electron microscopy(SEM). All of the resulting PZT thin films were crystallized with perovskite phase. The fine crystallinity of the films were fabricated. Also, we found that the ferroelectric properties from the dielectric constant of the PZT thin films were over 600 degrees, P-E hysteresis constant. And the leakage current densities of films were lower than $10^{-8}\;A/cm^2$. It is concluded that the PZT thin films by sol-gel process to be convinced of application for ferroelectric memory device.

• Journal of Information Processing Systems
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• v.4 no.4
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• pp.133-144
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• 2008

Clusters have become a popular alternative for building high-performance parallel computing systems. Today's high-performance system area network (SAN) protocols such as VIA and IBA significantly reduce user-to-user communication latency by implementing protocol stacks outside of operating system kernel. However, emerging parallel applications require a significant improvement in communication latency. Since the time required for transferring data between host memory and network interface (NI) make up a large portion of overall communication latency, the reduction of data transfer time is crucial for achieving low-latency communication. In this paper, Eager Data Transfer (EDT) mechanism is proposed to reduce the time for data transfers between the host and network interface. The EDT employs cache coherence interface hardware to directly transfer data between the host and NI. An EDT-based network interface was modeled and simulated on the Linux-based, complete system simulation environment, Linux/SimOS. Our simulation results show that the EDT approach significantly reduces the data transfer time compared to DMA-based approaches. The EDTbased NI attains 17% to 38% reduction in user-to-user message time compared to the cache-coherent DMA-based NIs for a range of message sizes (64 bytes${\sim}$4 Kbytes) in a SAN environment.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.9-12
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• 2004

In this paper, a new small sized Lateral Trench Electrode Power MOS was proposed. This new structure, called LTEMOS(Lateral Trench Electrode Power MOS), was based on the conventional lateral power MOS. But the entire electrodes of LTEMOS were placed in trench oxide. The forward blocking voltage of the proposed LTEMOS was improved by 1.5 times with that of the conventional lateral power MOS. The forward blocking voltage of LTEMOS was about 240 V. At the same size, an improvement of the forward blocking voltage of about 1.5 times relative to the conventional MOS was observed by using ISE-TCAD which was used for analyzing device's electrical characteristics. Because all of the electrodes of the proposed device were formed in each trench oxide, the electric field was crowded to trench oxide and punch-through breakdown was occurred, lately.