• International journal of advanced smart convergence
• /
• 제12권4호
• /
• pp.164-170
• /
• 2023

With the recent advances in AI (artificial intelligence) and HPC (high-performance computing) technologies, deep learning is proliferated in various domains of the 4th industrial revolution. As the workload volume of deep learning increasingly grows, analyzing the memory reference characteristics becomes important. In this article, we analyze the memory reference traces of deep learning workloads in comparison with traditional workloads specially focusing on read and write operations. Based on our analysis, we observe some unique characteristics of deep learning memory references that are quite different from traditional workloads. First, when comparing instruction and data references, instruction reference accounts for a little portion in deep learning workloads. Second, when comparing read and write, write reference accounts for a majority of memory references, which is also different from traditional workloads. Third, although write references are dominant, it exhibits low reference skewness compared to traditional workloads. Specifically, the skew factor of write references is small compared to traditional workloads. We expect that the analysis performed in this article will be helpful in efficiently designing memory management systems for deep learning workloads.

• Journal of Information Processing Systems
• /
• 제14권3호
• /
• pp.631-644
• /
• 2018

Many studies on flash memory-based buffer replacement algorithms that consider the characteristics of flash memory have recently been developed. Conventional flash memory-based buffer replacement algorithms have the disadvantage that the operation speed slows down, because only the reference is checked when selecting a replacement target page and either the reference count is not considered, or when the reference time is considered, the elapsed time is considered. Therefore, this paper seeks to solve the problem of conventional flash memory-based buffer replacement algorithm by dividing pages into groups and considering the reference frequency and reference time when selecting the replacement target page. In addition, because flash memory has a limited lifespan, candidates for replacement pages are selected based on the number of deletions.

• 인지과학
• /
• 제10권4호
• /
• pp.41-50
• /
• 1999

해마가 공간기억에서 중요한 기능을 담당하는 해부학적 구조임은 잘 알려져 있는 사실이다. 최근에는 두정엽 후위도 공간기억에서 중요한 역할을 할 것임을 시사하는 연구 결과가 보고되었다. 지금가지의 연구결과로는 두정엽 후위가 공간학습의 작업기억에 중요한지, 참조기억에 중요한지는 확실치 않다. 본 연구는 이들 두 뇌 구조물이 공간학습에서 작업기억과 참조기억의 습득에 공헌하는지를 알아보기 위하여 방사미로를 통한 쥐의 학습에 각 뇌 구조물의 손상이 미치는 영향을 조사하였다. 여덟 개의 방사형 미로를 이용한 쥐를 공간학습에서 작업기억과 참조기억은 각각 8개의 미로 모두에 물이 존재할 때와 4개의 미로에만 물이 존재할 때, 쥐가 물이 존재하는 미로의 위치를 기억하여 찾는 능력을 측정하였다. 기억의 습득에서 해마나 두정엽 후위의 관련여부를 알아보기 위해서 이들 부위의 손상이 방사미로 학습에 미치는 영향을 조사하였다. 방사미로 학습에서 작업기억은 해마손상에 의하여 저하되었으며 두정엽 후위 손상에 의하여서는 영향을 받지 않았다. 한편 참조기억의 습득은 해마 손상뿐만 아니라 두정엽 후위 손상에 의해서도 저하되었다. 이상의 결과는 공간학습에서 작업기억에는 해마가, 참조기억의 습득과정에는 해마와 두정엽 후위가 모두 관여할 것임을 시사한다.

• 한국정보통신학회:학술대회논문집
• /
• 한국해양정보통신학회 2008년도 추계종합학술대회 B
• /
• pp.91-94
• /
• 2008

본 논문에서는 Full 하드웨어 기반 베이스라인 프로파일 레벨 3규격 H.264 인코더 코덱에서 사용할 수 있는 Direct Memory Access (DMA)를 설계하였다. 설계된 모듈은 CMOS Image Sensor(CIS)로부터 영상을 입력받아 메모리에 저장한 후 인코더 코덱 모듈의 동작에 맞춰 원영상과 참조영상을 각각 한 매크로블록씩 메모리에서 읽어 공급 또는 저장하며, 인코더는 한 매크로블록씩 처리하는데 660 cycle이 소요된다. 설계한 구조를 검증하기 위해 JM 9.4와 같은 reference Encoder C를 개발하였으며, Encoder C로부터 test vector를 추출하여 설계한 회로를 검증하였다.

• Journal of Computing Science and Engineering
• /
• 제8권3호
• /
• pp.157-172
• /
• 2014

Contemporary embedded systems often use NAND flash memory instead of hard disks as their swap space of virtual memory. Since the read/write characteristics of NAND flash memory are very different from those of hard disks, an efficient page replacement algorithm is needed for this environment. Our analysis shows that temporal locality is dominant in virtual memory references but that is not the case for write references, when the read and write references are monitored separately. Based on this observation, we present a new page replacement algorithm that uses different strategies for read and write operations in predicting the re-reference likelihood of pages. For read operations, only temporal locality is used; but for write operations, both write frequency and temporal locality are used. The algorithm logically partitions the memory space into read and write areas to keep track of their reference patterns precisely, and then dynamically adjusts their size based on their reference patterns and I/O costs. Without requiring any external parameter to tune, the proposed algorithm outperforms CLOCK, CAR, and CFLRU by 20%-66%. It also supports optimized implementations for virtual memory systems.

• 한국방송∙미디어공학회:학술대회논문집
• /
• 한국방송공학회 2009년도 IWAIT
• /
• pp.258-262
• /
• 2009

In this paper, we propose an effective memory reduction algorithm to reduce the amount of reference frame buffer and memory bandwidth in video encoder and decoder. In general video codecs, decoded previous frames should be stored and referred to reduce temporal redundancy. Recently, reference frames are recompressed for memory efficiency and bandwidth reduction between a main processor and external memory. However, these algorithms could hurt coding efficiency. Several algorithms have been proposed to reduce the amount of reference memory with minimum quality degradation. They still suffer from quality degradation with fixed-bit allocation. In this paper, we propose an adaptive block-based min-max quantization that considers local characteristics of image. In the proposed algorithm, basic process unit is $8{\times}8$ for memory alignment and apply an adaptive quantization to each $4{\times}4$ block for minimizing quality degradation. We found that the proposed algorithm could improve approximately 37.5% in coding efficiency, compared with an existing memory reduction algorithm, at the same memory reduction rate.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제15권2호
• /
• pp.223-231
• /
• 2015

As smartphones support a variety of applications and their memory demand keeps increasing, the design of an efficient memory management policy is becoming increasingly important. Meanwhile, as nonvolatile memory (NVM) technologies such as PCM and STT-MRAM have emerged as new memory media of smartphones, characterizing memory references for NVM-based smartphone memory systems is needed. For the deep understanding of memory access features in smartphones, this paper performs comprehensive analysis of memory references for various smartphone applications. We first analyze the temporal locality and frequency of memory reference behaviors to quantify the effects of the two properties with respect to the re-reference likelihood of pages. We also analyze the skewed popularity of memory references and model it as a Zipf-like distribution. We expect that the result of this study will be a good guidance to design an efficient memory management policy for future smartphones.

• 방송공학회논문지
• /
• 제16권2호
• /
• pp.339-349
• /
• 2011

고해상도 비디오에 대한 압축 성능 향상을 위해 내부 연산 비트 깊이를 증가시키는 IBDI (Internal Bit Depth Increase) 기법은 괄목할 만한 부호화 효율 증가 이득을 얻을 수 있었지만, 참조 영상을 저장하기 위해 소요되는 내부 메모리가 증가하는 문제가 발생한다. 따라서 IBDI 기법의 부호화 효율은 유지하면서 내부 메모리 증가 문제를 해결하기 위해 메모리 압축 기법이 제안되었다. 기존 메모리 압축 기법은 영상의 각 수행블록마다 일정량의 부가정보를 이용하여 메모리 압축을 수행함으로써, 부호화 효율은 유지하면서 내부 메모리를 성공적으로 줄일 수 있었다. 하지만 각각의 수행블록마다 발생하는 부가정보에 의해 메모리 압축 성능이 제한되는 한계가 존재한다. 따라서 본 논문에서는 기존 메모리 압축 방법의 한계를 극복하기 위해, 발생하는 부가정보량을 크게 줄일 수 있도록 선택적 수행블록 병합을 이용한 메모리 압축 방법을 제안하였다. 제안 방법을 통해 부호화 효율을 기존 메모리 압축 방법과 동일하게 유지하면서 메모리 압축에 의해 발생하는 부가정보량은 크게 감소하는 이득을 얻을 수 있었다.

• 한국정보처리학회논문지
• /
• 제7권4호
• /
• pp.1082-1091
• /
• 2000

In Distributed Shared Memory systems, false sharing occurs when two different data items, not shared but accessed by two different processors, are allocated to a single block and is an important factor in degrading system performance. The paper first analyzes shared memory allocation and reference patterns in parallel applications that allocate memory for shared data objects using a dynamic memory allocator. The shared objects are sequentially allocated and generally show different reference patterns. If the objects with the same size are requested successively as many times as the number of processors, each object is referenced by only a particular processor. If the objects with the same size are requested successively much more than the number of processors, two or more successive objects are referenced by only particular processors. On the basis of these analyses, we propose a memory allocation scheme which allocates each object requested by different processors to different pages and evaluate the existing memory allocation techniques for reducing false sharing faults. Our allocation scheme reduces a considerable amount of false sharing faults for some applications with a little additional memory space.

• International journal of advanced smart convergence
• /
• 제12권1호
• /
• pp.70-75
• /
• 2023

With the recent proliferation of memory-intensive workloads such as deep learning, analyzing memory access characteristics for efficient memory management is becoming increasingly important. Since read and write operations in memory access have different characteristics, an efficient memory management policy should take into accountthe characteristics of thesetwo operationsseparately. Although some previous studies have considered the different characteristics of reads and writes, they require a modified hardware architecture supporting read bits and write bits. Unlike previous approaches, we propose a software-based management policy under the existing memory architecture for considering read/write characteristics. The proposed policy logically partitions memory space into the read/write area and the write area by making use of reference bits and dirty bits provided in modern paging systems. Simulation experiments with memory access traces show that our approach performs better than the CLOCK algorithm by 23% on average, and the effect is similar to the previous policy with hardware support.