• Journal of the Korean Ceramic Society
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• v.42 no.2 s.273
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• pp.104-109
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• 2005

To study the role of PbO as the buffer layer, Pt/PZT/PbO/Si with the MFIS structure was deposited on the p-type (100) Si substrate by the r.f. magnetron sputtering with $Pb_{1.1}Zr_{0.53}Ti_{0.47}O_3$ and PbO targets. When PbO buffer layer was inserted between the PZT thin film and the Si substrate, the crystallization of the PZT thin films was considerably improved and the processing temperature was lowered. From the result of an X-ray Photoelectron Spectroscopy (XPS) depth profile result, we could confirm that the substrate temperature for the layer of PbO affects the chemical states of the interface between the PbO buffer layer and the Si substrate, which results in the inter-diffusion of Pb. The MFIS with the PbO buffer layer show the improved electric properties including the high memory window and low leakage current density. In particular, the maximum value of the memory window is 2.0V under the applied voltage of 9V for the Pt/PZT(200 nm, $400^{\circ}C)/PbO(80 nm)/Si$ structures with the PbO buffer layer deposited at the substrate temperature of $300^{\circ}C$.

• Korean Journal of Materials Research
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• v.11 no.4
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• pp.290-293
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• 2001

The SrBi$_2$Nb$_2$O$_{9}$ (SBN) thin films were deposited on p-type(100) Si substrates by rf magnetron sputtering to confirm the Possibility of Pt/SBN/Si structure for the application of nondestructive read out ferroelectric random access memory (NDRO- FRAM). The SBN thin films were deposited by co-sputtering method with Sr$_2$Nb$_2$O$_{7}$ (SNO) and Bi$_2$O$_3$ ceramic targets. The SBN thin films deposited at room temperature were annealed at $700^{\circ}C$ for 1hr in $O_2$ ambient. The structural and electrical properties of SBN with different power ratios of targets were measured by x-ray diffraction(XRD), scanning electron microscopy(SEM), capacitance-voltage(C-V), and current-voltage(I-V). The C-V curves of the SBN films showed hysteresis curves of a clockwise rotation showing ferroelectricity. When the Power ratio of the SNO/Bi$_2$O$_3$ targets was 120 W/100 W, the SBN thin films had excellent electrical properties. The memory window of SBN thin film was 1.8 V-6.3 V at applied voltage of 3 V-9 V and the leakage current density was 1.5 $\times$ 10$^{-7}$ A/$\textrm{cm}^2$ at applied voltage of 5 V The composition of SBN thin films was analysed by electron probe X-ray micro analyzer(EPMA) and the atomic ratio of Sr:Bi:Nb with pawer ratio of 120 W/100 W was 1:3:2.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.122-122
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• 2008

Recently, Metal/Alumina/Silicon-Nitride/Silicon-Oxide/Silicon (MANOS) structures are one of the most attractive candidates to realize vertical scaling of high-density NAND flash memory [1]. However, as ANO layers are miniaturized, negative and positive bias temperature instability (NBTI/PBTI), such as the flat band voltage shift, ${\Delta}V_{FB}$, the interfacial trap density increase, ${\Delta}D_{it}$, the gate leakage current, ${\Delta}I_G$. and the retention characteristics, in MONOS capacitors, becomes an important issue in terms of reliability. It is well known that tunnel oxide degradation is a result of the oxide and interfacial traps generation during FN (Fowler-Nordheim) stress [2]. Because the bias temperature stress causes an increase of both interfacial-traps and fixed oxide charge could be a factor, witch can degrade device reliability during the program and erase operation. However, few studies on NBTI/PBTI have been conducted on improving the reliability of MONOS devices. In this work, we investigate the effect of post-annealing gas on bias temperature instability (BTI), such as the flat band voltage shift, ${\Delta}V_{FB}$, the interfacial trap density shift, ${\Delta}I_G$ retention characteristics, and the gate leakage current characteristics of MANOS capacitors. MANOS samples annealed at $950^{\circ}C$ for 30 s by a rapid thermal process were treated via additional annealing in a furnace, using annealing gases $N_2$ and $N_2-H_2$ (2 % hydrogen and 98 % nitrogen mixture gases) at $450^{\circ}C$ for 30 min. MANOS samples annealed in $N_2-H_2$ ambient had the lowest flat band voltage shift, ${\Delta}V_{FB}$ = 1.09/0.63 V at the program/erase state, and the good retention characteristics, 123/84 mV/decade at the program/erase state more than the sample annealed at $N_2$ ambient.

• Journal of the Korean Vacuum Society
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• v.9 no.2
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• pp.136-143
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• 2000

$SrBi_2Ta_2O_9;(SBT)$ films were deposited on p-type Si(100) at room temperature by rf magnetron sputtering method to confirm the possibility of application of $Pt/SBT/Pt/Ti/SiO_2/Si$ structure (MFM) for destructive read out ferroelectric RAM (random access memory). Their structural characteristics with the various annealing times and Ar/$O_2$ gas flow ratios in sputtering were observed by XRD (X-ray diffractometer) and the surface morphologies were observed by FE-SEM (field emission scanning electron microscopy), and their electrical properties were observed by P-V (polarization-voltage measurement) and I-V (current-voltage measurement). The Ar/$O_2$ gas flow ratios of sputtering gas were changed from 1 : 4 to 4 : 1 and SBT thin films were deposited at room temperature. The films show (105), (110) peaks of SBT by XRD measurement. SBT thin films deposited at room temperature were crystallized by furnace annealing at 80$0^{\circ}C$ in oxygen atmosphere during either one hour or two hours. Among their electrical properties, P-V curves showed shaped hysteresis curves, but the SBT thin films showed the asymmetric ferroelectric properties in P-V curves. When Ar/$O_2$ gas flow ratios are 1 : 1, 2: 1, the leakage current density values of SBT thin films are good, those values of 3 V, 5 V, and 7 V are respectively $3.11\times10^{-8} \textrm{A/cm}^2$, $5\times10^{-8}\textrm{A/cm}^2$, $7\times10^{-8}\textrm{A/cm}^2$.After two hours of annealing time, their electrical properties and crystallization are improved.

• Journal of the Korean Ceramic Society
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• v.34 no.2
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• pp.202-208
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• 1997

Bi-layered SrBi2Ta2O9(SBT) films were deposited on Pt/Ti/SiO2/Si sibstrates by rf magnetron sputt-ering at room temperature and then were annealed at 75$0^{\circ}C$, 80$0^{\circ}C$ and 85$0^{\circ}C$ for 1 hour in oxygen at-mosphere. The film composition of SrBi2Ta2O9 was obtained after depositing at room temperature and annealing at 80$0^{\circ}C$. Excess 20mole% Bi2O3 and 30 mole% SrCO3 were added to the target to compensate for the lack of Bi and Sr in SBT film. 200 nm thick SBT film exhibited and dense microstructure, adielectric constant of 210, and a dissipation factor of 0.05 at 1 MHz frequency. The films exhibited Curie temperature of 32$0^{\circ}C$ and a dielectric constant of 314 at that temperature under 100 kHz frequency. The remanent polarization(2Pr) and the coercive field(2Ec) of the SBT films were 9.1 $\mu$C/$\textrm{cm}^2$ and 85 kV/cm at an applied voltage of 3V, resspectively and the SBT film showed a fatigue-free characteristics up to 1010 cy-cles under 5V bipolar pulse. The leakage current density of the SBT film was about 7$\times$10-7A/$\textrm{cm}^2$ at 150 kV/cm. Fatigue-free SBT films prepared by rf magnetron sputtering can be suitable for application to non-volatile memory device.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.1
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• pp.91-105
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• 2016

Carbon Nanotube Field-Effect Transistors (CNTFETs) have been studied as candidates for post Si CMOS owing to the better electrostatic control and high mobility. To enhance the immunity against short - channel effects (SCEs), the novel channel and gate engineered architectures have been proposed to improve CNTFETs performance. This work presents a comprehensive study of the influence of channel and gate engineering on the CNTFET switching, high frequency and circuit level performance of carbon nanotube field-effect transistors (CNTFETs). At device level, the effects of channel and gate engineering on the switching and high frequency characteristics for CNTFET have been theoretically investigated by using a quantum kinetic model. This model is based on two-dimensional non-equilibrium Green's functions (NEGF) solved self - consistently with Poisson's equations. It is revealed that hetero - material - gate and lightly doped drain and source CNTFET (HMG - LDDS - CNTFET) structure can significantly reduce leakage current, enhance control ability of the gate on channel, improve the switching speed, and is more suitable for use in low power, high frequency circuits. At circuit level, using the HSPICE with look - up table(LUT) based Verilog - A models, the impact of the channel and gate engineering on basic digital circuits (inverter, static random access memory cell) have been investigated systematically. The performance parameters of circuits have been calculated and the optimum metal gate workfunction combinations of ${\Phi}_{M1}/{\Phi}_{M2}$ have been concluded in terms of power consumption, average delay, stability, energy consumption and power - delay product (PDP). In addition, we discuss and compare the CNTFET-based circuit designs of various logic gates, including ternary and binary logic. Simulation results indicate that LDDS - HMG - CNTFET circuits with ternary logic gate design have significantly better performance in comparison with other structures.

• Journal of the Microelectronics and Packaging Society
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• v.10 no.2
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• pp.7-12
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• 2003

The $Bi_{3.3}La_{0.7}O_{12}$(BLT) capacitors with Metal-Ferroelectric-Insulator-Silicon structure were prepared on $SiO_2/Si$ substrates by using sol-gel method. The BLT thin films annealed at $650^{\circ}C$ and $700^{\circ}C$ showed randomly oriented perovskite crystalline structures. The full with at half maximum (FWHM) of the (117) main peak was decreased from $0.65^{\circ}$ to $0.53^{\circ}$ with increasing the annealing temperature from $650^{\circ}C$ to $700^{\circ}C$, indicating the improvement in the crystalline quality of the film. In addition, the grain size and $R_rms$ , values were increased with increasing the annealing temperatures, showing the rough film surface at higher annealing temperatures. From the capacitance-voltage (C-V) measurements, the memory window voltage of the BLT film annealed at $700^{\circ}C$ was found to be about 0.7 V at an applied voltage of 5 V. The leakage current density of the BLT film annealed at $700^{\circ}C$ was about $3.1{\times}10^{-8}A/cm^2$.

• Korean Journal of Materials Research
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• v.10 no.3
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• pp.199-203
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• 2000

$Ta_2_O5$ and $Sr_0.8Bi_2.4Ta_2O_9$ films were deposited on p-type Si(100) substrates by a rf-magnetron sputtering and the metal organic decomposition (MOD), respectively.The electrical characteristics of the $Pt/SBT/Ta_2O_5/Si$ structure were obtained as the functions of $O_2$ gas flow ratio during the $Ta_2_O5$ sputtering and $Ta_2_O5$ thickness. And to certify the role of $Ta_2_O5$ as a buffer layer, the electrical characteristics of $Pt/SBT/Ta_2O_5/Si$ were compared. $Pt/SBT/Ta_2O_5/Si$ capacitor with 20% $O_2$ gas flow ratio during the $Ta_2_O5$ sputtering did now show typical C-V curve of metal/ferroelectric/insulator/semiconductor (MFIS) structure. The capacitor with 20% $O_2$ gas flow ratio during the $Ta_2_O5$ sputtering had the largest memory window. And the memory window was decreased as the $Ta_2_O5$ gas flow ratio during the $Ta_2_O5$ sputtering was increased to 40%, 60%. In the C-V characteristics of the $Pt/SBT/Ta_2O_5/Si$ capacitors with the different $Ta_2_O5$ thickness, the capacitor with 26nm thickness of $Ta_2_O5$ had the largest memory window. The C-V and leakage current characteristics of the Pt/SBT/Si structure were worse than those of $Pt/SBT/Ta_2O_5/Si$ structure. These results and Auger electron spectroscopy (AES) measurement showed that $Ta_2_O5$ films as a buffer layer tool a role to prevent from the formation of intermediate phase and interdiffusion between SBT and Si.

• Smart Structures and Systems
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• v.11 no.5
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• pp.555-567
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• 2013

An Remote Corrosion Monitoring (RCM) system consists of an anode with low potential, the metallic structures against corrosion, an electrode to provide reference potential, and a data-acquisition system to ensure the potential difference for anticorrosion. In more detail, the data-acquisition (DAQ) system monitors the potential difference between the metallic structures and a reference electrode to identify the correct potential level against the corrosion of the infrastructures. Then, the measured data are transmitted to a central office to remotely keep track of the status of the corrosion monitoring (CM) system. To date, the RCM system is designed to achieve low power consumption, so that it can be simply powered by batteries. However, due to memory effect and the limited number of recharge cycles, it can entail the maintenance fee or sometimes cause failure to protect the metallic structures. To address this issue, the low-overhead energy harvesting circuitry for the RCM systems has designed to replenish energy storage elements (ESEs) along with redeeming the leakage of supercapacitors. Our developed energy harvester can scavenge the ambient energy from the corrosion monitoring environments and store it as useful electrical energy for powering local data-acquisition systems. In particular, this paper considers the energy harvesting from potential difference due to galvanic corrosion between a metallic infrastructure and a permanent copper/copper sulfate reference electrode. In addition, supercapacitors are adopted as an ESE to compensate for or overcome the limitations of batteries. Experimental results show that our proposed harvesting schemes significantly reduce the overhead of the charging circuitry, which enable fully charging up to a 350-F supercapacitor under the low corrosion power of 3 mW (i.e., 1 V/3 mA).

• Journal of the Korea Institute of Information Security & Cryptology
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• v.25 no.4
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• pp.941-950
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• 2015

Internet banking is widely used in our life with the development of the internet. At the same time, phishing attacks to internet banking have been increased by using malicious object to make unfair profit. People using internet banking service in Korea is required to install security modules such as anti-virus and keyboard protection. However phishing attack technique has been progressed and the advanced technique such as memory hacking defeats the security module of internet banking service. In this paper, we describe internet banking security modules provided by Korean internet banks and analyze how keyboard encryption module works. And we propose an attack to manipulate account transfer information using javascript. Although keyboard protection module provides two functions that protect leakage and manipulation of account transfer information submitted by users against the malicious program of hackers. Our proposed technique can manipulate the account transfer information and result html pages.