• Proceedings of the Korea Information Processing Society Conference
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• 2007.05a
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• pp.810-813
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• 2007

본 논문에서는 맥락 인식 (context-aware) 애플리케이션 개발에 있어서 사용자의 맥락 정보를 보다 효과적으로 처리할 수 있는 사용자 중심의 맥락 모델을 제안한다. 유비쿼터스 컴퓨팅 개념의 확산과 함께 맥락 인식 애플리케이션들에 관한 많은 연구가 진행되고 있다. 하지만, 맥락에 대한 정의는 여전히 모호하며, 애플리케이션들 마다 서로 다른 형태의 맥락을 활용하고 있기 때문에, 맥락에 대한 보다 구체적인 정의와 다양한 애플리케이션에 활용 가능한 형태의 맥락 모델이 필요하다. 제안된 사용자 중심의 맥락 모델에서는 사용자가 애플리케이션과 상호작용할 때 사용자의 직접적인 명령을 제외한 사용자와 관련된 정보를 맥락으로 정의한다. 또한, 제안된 사용자 중심의 맥락은 5W1H 형태로 구조화한 맥락요소 (ContextElement), 맥락 요소들을 편리하게 처리할 수 있는 연산자들을 포함하는 맥락 (Context), 그리고 단편적인 맥락 정보뿐만 아니라 기존의 맥락 정보까지도 활용할 수 있는 맥락메모리 (ContextMemory)로 구성된다. 특히, 다양한 센서들로부터 획득된 정보를 맥락 모델의 인터페이스를 통해서 맥락 인식 애플리케이션에서 활용할 수 있기 때문에, 서로 다른 맥락 인식 애플리케이션들을 개발함에 있어서도 동일한 맥락 모델을 사용할 수 있는 장점이 있다. 제안된 맥락 모델의 유용함을 보이기 위해서, 센서로부터 획득된 맥락 정보를 처리하는데 소요되는 시간을 측정하는 실험을 하였다. 따라서 제안된 사용자 중심의 맥락 모델은 사용자와 맥락 인식 애플리케이션간 자연스러운 상호작용을 지원할 것으로 기대된다.) kcal/mol의 생성활성화 에너지 감을 나타내었고, TGA로부터의 분해활성화 에너지는 각각 31.94, 30.84, 24.16 kcal/mol의 값을 나타내었다.로 감소되었다(35.2% vs. 77.4%; p<0.01). 실험 2에서 다양한 정자 농도에 의한 정자 침투율과 정상 수정률을 바탕으로 판단했을 때 $4.6{\times}10^6/ml$의 정자 농도가 다른 정자 농도에 비해 난구 세포부착 난자의 체외 수정에 적합한 것으로 나타났다. 체외 수정과정에서 난구 세포 부착된 상태로 수정된 난자는 나화 난자에 비해 유의적으로(p<0.05) 높은 분할률(48.8% vs. 58.9%), 배반포 형성률(11.0% vs. 22.8%)과 배반포 세포수$(22{\pm}2\;vs.\;29{\pm}2)$를 나타내었다. 본 연구의 결과로부터 돼지의 체외 수정과정에서 난구 세포의 존재는 정자 침투를 저해하지만 분할률, 배반포 형성률 및 배반포의 세포수를 증가시키는 것으로 사료된다.수의 유출입 지점에 온도센서를 부착하여 냉각수의 온도를 측정하고 냉각수의 공급량과 대기의 온도 등을 측정하여 대사열의 발생을 추정할 수 있었다. 동시에 이를 이용하여 유가배양시 기질을 공급하는 공정변수로 사용하였다 [8]. 생물학적인 폐수처리장치인 활성 슬러지법에서 미생물의 활성을 측정하는 방법은 아직 그다지 개발되어있지 않다. 본 연구에서는 슬러지의 주 구성원이 미생물인 점에 착안하여 침전시 슬러지층과 상등액의 온도차를 측정하여 대사열량의 발생량을 측정하고 슬러지의 활성을 측정할 수 있는 방법을 개발하였다.enin과

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.42 no.3 s.303
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• pp.81-90
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• 2005

When we transmit signals, which are quantized by the vector quantizer (VQ), through noisy channels, the overall performance of the coding system is very dependent on the employed quantization scheme and the channel error effect. In order to design an optimal coding system, the source and channel coding scheme should be jointly optimized as in the channel-optimized VQ. As a suboptimal approach, we may consider the robust VQ (RVQ). In RVQ, we consider developing an index assignment function for mapping the output of quantizers to channel symbols so that the effect of the channel errors is minimized. Recently, a VQ, which can reduce the encoding complexity and is called the sample-adaptive product quantizer (SAPQ), has been proposed. SAPQ has very similar quantizer structure as to the product quantizer (PQ). However, the quantization performance can be better than PQ. Further, the encoding complexity and the memory requirement for the codebooks are lower than the regular full-search VQ case. In this paper, SAPQ is employed in order to design an RVQ to channel errors by reducing the vector dimension. Discussions on the codebook structure of SAPQ and experiments are introduced in an aspect of robustness to noisy channels.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.38 no.5
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• pp.16-26
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• 2001

In this paper, we present a new scheduling method called CDSS(Carried-Dependence Self-Scheduling) for efficiently execution of the loop with intra dependency between iterations based on the central queue. We also implemented it on shared memory system using Java language. Also, we study the modification that converts the existing self-scheduling method based on the central task queue for parallel loops onto the same form applied to loop with loop-carried dependences. The proposed method is self scheduling and assigns the loops in three-level considering the synchronization point according to the dependence distance of the loops. To adapt the proposed scheme and modified methods into various platforms, including a uni-processor system, we use threads for implementation. Compared to other assignment algorithms with various changes of application and system parameters, CDSS is found to be more efficient than other methods in overall execution time including scheduling overheads. CDSS shows improved performance over modified SS, Factoring, GSS and CSS by about 0.02, 40.5, 46.1 and 53.6%, respectively. In CDSS, we achieve the best performance on varying application programs using a few threads, which equal the dependence distance.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.10a
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• pp.381-385
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• 2010

An aging Society solitary life old mans are increasing. The nurses have to visit old mans and must confirm their disease, because they do not act well. It is very difficult to take care old man, because the number of Nurses are small. This problem is solved by collection of data about condition of old mans from long distance. Data communication with Ethernet have benefit to collection of measurement of old man's condition. The Data storage system an long distance place are storaged data and after several day data was transmitted to the DB over the Ethernet. For Miniaturization of such system the system must be OS-less Embedded Ethernet Server system. Such system manages the file management system only with H/W. The Storage device is used SD-card. SD Card is small size and operates with small power. By using 512MB sd memory card, it is possible to storage during 5~6 years, 10 byte of temperature value per second. In this paper, we make a Embedded Ethernet Server using W3100A, Atmega128 MCU and data stroage device using SD-Card. This system operates with O/S-less Embedded Ethernet Server. We talk about file System, Storage and Ethernet. We explained about MCU Atmega128, Interface between LAN LSIand W3100A, Interface between W3100A and Phyceiver RTL8201, data I/O between MCU and SD-Card and File System. We shows the experiment device and result of monitoring.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.6A
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• pp.618-627
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• 2002

In processing images using 2 dimensional Discrete Wavelet Transform(2D-DWT), the method to process the pixels around the image boundary may affect the quality of image and the cost to implement in hardware and software. This paper proposed an effective method to treat the boundary pixels, which is apt to implement in hardware and software without losing the quality of the image costly. This method processes the 2-D image as 1-D array so that 2-D DWT is performed by considering the image with the serial-sequential data structure (Serial-Sequential Processing). To show the performance and easiness in implementation of the proposed method, an image compression codec which compresses image and reconstructs it has been implemented and experimented. It included log-scale fried quantizer, but the entropy coder was not implemented. From the experimental results, the proposed method showed the SNR of almost the same SNR(Signal to Noise Ratio) to the Periodic Expansion(PE) method when the compression ratio(excluding entropy coding) of 2:1, 15.3% higher than Symmetric Expansion(SE) method, and 9.3% higher than 0-pixel Padding Expansion(ZPE) method. Also PE method needed 12.99% more memory space than the proposed method. By considering only the compression process, SE and ZPE methods needed additional operations than the proposed one. In hardware implementation, the proposed method in this paper had 5.92% of overall circuit as the control circuit, while SE, PE, and ZPE method has 22%, 21,2%, and 11.9% as the control circuit, respectively. Consequently, the proposed method can be thought more effective in implementing software and hardware without losing any image quality in the usual image processing applications.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.46 no.1
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• pp.88-95
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• 2009

This paper presents a traffic pattern matching hardware that can be used in high performance network applications. The presented hardware is designed for a contents security system which is to block various kinds of information drain or intrusion activities. The hardware consists of two parts: the header lookup and string pattern matching parts. For implementing the header lookup part in hardware, the TCAMs(ternary CAMs) are popularly used. Since the TCAM approach is inefficient in terms of the hardware and memory costs and the power consumption, however, we adopt and modify an alternative approach based on the comparator arrays and the HiCuts tree. Our implementation results, using Xilinx FPGA XC4VSX55, show that our design can reduce the usage of the FPGA slices by about 26%, and the Block RAM by about 58%. In the design of string pattern matching part, we design and use a hashing module based on cellular automata, which is hardware efficient and consumes less power by adaptively changing its configuration to reduce the collision rates.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.10
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• pp.96-106
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• 2014

Previous academic research on FPGA tools has relied on simple imaginary models for the targeting architecture. As the first step to overcome such restriction, the issues on analytic placement and legalization which are applied to commercial FPGAs have been brought up, and several techniques to remedy them are presented, and evaluated. First of all, the center of gravity of the placed cells may be far displaced from the center of the chip during analytic placement. A function is proposed to be added to the objective function for minimizing this displacement. And then, the density map is expanded into multiple layers to accurately calculate the density distribution for each of the cell types. Early fixation is also proposed for the memory blocks which can be placed at limited sites in small numbers. Since two flip-flops share control pins in a slice, a compatibility constraint is introduced during legalization. Pre-packing compatible flip-flops is proposed as a proactive step. The proposed techniques are implemented on the K-FPGA fabric evaluation framework in which commercial architectures can be precisely modeled, and modified for enhancement, and validated on twelve industrial strength examples. The placement results show that the proposed techniques have reduced the wire length by 22%, and the slice usage by 5% on average. This research is expected to be a development basis of the optimization CAD tools for new as well as the state-of-the-art FPGA architectures.

• Journal of Broadcast Engineering
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• v.14 no.6
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• pp.661-675
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• 2009

The carelessly and illegally copied contents are raising serious social problem as internet and multimedia technologies are advancing. Therefore, development of video copy detection system must be settled without delay. In this paper, we propose the hierarchical video copy detection method that estimates similarity using statistical characteristics between original video and manipulated(transformed) copy video. We rank according to luminance value of video to be robust to spacial transformation, and choose similar videos categorized as candidate segments in huge amount of database to reduce processing time and complexity. The copy videos generally insert black area in the edge of the image, so we remove rig black area and decide copy or not by using statistical characteristics of original video and copied video with center part of frame that contains important information of video. Experiment results show that the proposed method has similar keyframe accuracy to reference method, but we use less memory to save feature information than reference's, because the number of keyframes is less 61% than that of reference's. Also, the proposed method detects if the video is copied or not efficiently despite expansive spatial transformations such as blurring, contrast change, zoom in, zoom out, aspect ratio change, and caption insertion.

• Spatial Information Research
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• v.18 no.4
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• pp.109-120
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• 2010

Recently, due to rapid increasement of spatial data collected from various geosensors in u-GIS environments, the importance of spatial index for efficient search of large spatial data is rising gradually. Especially, researches based R-Tree to improve search performance of spatial data have been actively performed. These previous researches focus on reducing overlaps between nodes or the height of the R -Tree. However, these can not solve an unnecessary node access problem efficiently occurred in tree traversal. In this paper, we propose a MR-Tree(Mapping-based R-Tree) to solve this problem and to support efficient search of large spatial data. The MR-Tree can improve search performance by using a mapping tree for direct access to leaf nodes of the R-Tree without tree traversal. The mapping tree is composed with MBRs and pointers of R-Tree leaf nodes associating each partition which is made by splitting data area repeatedly along dimensions. Especially, the MR-Tree can be adopted in various variations of the R-Tree easily without a modification of the R-Tree structure. In addition, because the mapping tree is constructed in main memory, search time can be greatly reduced. Finally, we proved superiority of MR-Tree performance through experiments.

• Journal of Internet Computing and Services
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• v.15 no.6
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• pp.125-132
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• 2014

Since frequent pattern mining was proposed in order to search for hidden, useful pattern information from large-scale databases, various types of mining approaches and applications have been researched. Especially, frequent graph pattern mining was suggested to effectively deal with recent data that have been complicated continually, and a variety of efficient graph mining algorithms have been studied. Graph patterns obtained from graph databases have their own importance and characteristics different from one another according to the elements composing them and their lengths. However, traditional frequent graph pattern mining approaches have the limitations that do not consider such problems. That is, the existing methods consider only one minimum support threshold regardless of the lengths of graph patterns extracted from their mining operations and do not use any of the patterns' weight factors; therefore, a large number of actually useless graph patterns may be generated. Small graph patterns with a few vertices and edges tend to be interesting when their weighted supports are relatively high, while large ones with many elements can be useful even if their weighted supports are relatively low. For this reason, we propose a weight-based frequent graph pattern mining algorithm considering length-decreasing support constraints. Comprehensive experimental results provided in this paper show that the proposed method guarantees more outstanding performance compared to a state-of-the-art graph mining algorithm in terms of pattern generation, runtime, and memory usage.