• Journal of information and communication convergence engineering
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• v.7 no.2
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• pp.199-202
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• 2009

Adaptive memory management is a serious issue in data stream management. Data stream differ from the traditional stored relational model in several aspect such as the stream arrives online, high volume in size, skewed data distributions. Data skew is a common property of massive data streams. We propose the predicted allocation strategy, which uses predictive processing to cope with time varying data skew. This processing includes memory usage estimation and indexing with timestamp. Our experimental study shows that the predictive strategy reduces both required memory space and latency time for skewed data over varying time.

• Communications of the Korean Institute of Information Scientists and Engineers
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• v.5 no.2
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• pp.90-93
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• 1987

Relatively few papers are known to study the clustering the same kind of data records in a cylinder. In this article, I reviewed the clustering algorithms especially for the cellular list file which have been studied.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.997-998
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• 2008

In this paper, we proposed a reduced memory overdrive architecture. Proposed overdrive architecture consists of 2D-DWT filter, BLI and Color Conversion block. For Frame Memory reduction we eliminated HH data in DWT-IDWT process and converted color space RGB into YCbCr. Consequently, we reduced Frame Memory about 50%.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.215-216
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• 2008

Ultra wideband (UWB) system is one of the promising solutions for future short-range communication which has recently received a great attention by many researchers. In this paper, we proposed 128-point low power FFT structure based on the memory for UWB systems. The proposed structure can improve implementation area and power consumption efficiency as it consists of one of the butterfly PE and a little memory.

• Anxiety and mood
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• v.8 no.1
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• pp.3-8
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• 2012

Patients with panic disoder (PD) show recollection of their first panic attack, which resembles a trauma that is perceived as an unexpected frightening and subjectively life-threatening event. Information-processing models suggest that anxiety disorders may be characterized by a memory bias for threat-related information. This paper reviews the previous researches that investigated the implicit and/or explicit biases in patients with panic disorder. Among the 17 studies, which addressed the explicit memory bias in PD patients, 11 (64.7%) were found to be explicit memory bias in PD patients. In regards to the implicit memory bias, 4 out of 9 studies (44.4%) were found to support the memory bias. The result shows that evidence of explicit memory bias in PD patients was supported by a number of previous researches. However, evidence of implicit memory bias seems less robust, thus, needs further research for replication. Also, development of new paradigms and applications of various methods will be needed in further researches on memory bias in PD patients.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.8
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• pp.1635-1641
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• 2011

In this paper, we research the method for HDD I/O Performance improvement by Filter Driver & NAND FLASH Memory. This paper was started from NAND Flash Memory can not be replaced by HDD because of high cost. So We consider that using NAND Flash Memory as cache for HDD. It can be achieved high HDD Performance through Filter Driver by low cost.

• Journal of Institute of Control, Robotics and Systems
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• v.13 no.6
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• pp.519-524
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• 2007

The OBC(on-board computer) of a satellite which plays a role of the controller for the satellite should be equipped with preventive measures against transient errors caused by SEU(single event upset). Since memory devices are pretty much susceptible to these transient errors, it is essential to protect memory devices against SFU. A common method exploits an error detection and correction code and additional memory devices, combined with periodic memory scrubbing. This paper proposes an effective memory scrubbing scheme for the OBC of STSAT-2. The memory system of the OBC is briefly mentioned and the reliability of the information stored in the memory system is analyzed. The result of the reliability analysis shows that there exist optimal scrubbing periods achieving the maximum reliability for allowed overall scrubbing overhead and they are dependent on the significance of the information stored. These optimal scrubbing periods from a reliability point of view are derived analytically.

• Journal of the Korea Society of Computer and Information
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• v.22 no.5
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• pp.1-9
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• 2017

Recently, flash memory has been in a great demand from embedded system sectors for storage devices. However, program/erase (P/E) cycles per block are limited on flash memory. For the limited number of P/E cycles, many wear leveling techniques are studied. They prolonged the life time of flash memory using information tables. As one of the techniques, block erase table (BET) method using a bit array table was studied for embedded devices. However, it has a disadvantage in that performance of wear leveling is sharply low, when the consumption of memory is reduced. To solve this problem, we propose a novel wear leveling technique using Sampling-based Block Erase Table (SBET). SBET relates one bit of the bit array table to each block by using exclusive OR operation with round robin function. Accordingly, SBET enhances accuracy of cold block information and can prevent to decrease the performance of wear leveling. In our experiment, SBET prolongs life time of flash memory by up to 88%, compared with previous techniques which use a bit array table.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.9C
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• pp.880-886
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• 2009

Recently, the memory is used in many electronic devices, thus, the many researchers make a study of the memory. To increase a storage capacity per memory block, the researchers study for reducing the fabrication process of memory and multi-level cell memory which is storing more than 2-bits in a cell. However, the multi-level cell memory has low bit-error rates by various noises. In this paper, we study the noise of multi-level cell memory, and we propose the channel model of multi-level cell memory.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.547-550
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• 2005

This treatise studies and developed flash memory drive of ATA bus that use flash memory which is employment amount memory semiconductor to improve problem of hard-disk that is existing ATA bus. While general hard-disk is sensitive external impact or shock, but flash memory drive do save chapter as well as is strong in external impact using semiconductor memory element that disk is not low electric power, light weight possible . Practical use is expected do save chapter for embedded system or black box for vehicles, soldiers hereafter therefore.