• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.12
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• pp.1792-1798
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• 2017

Event Data Recorder(Car Black-Box) with WiFi dongle have been released, and the platform of the majority is the Linux platform. This is because the platform development is possible in little investment cost by reducing the source licensing costs by taking advantage of the open source. But utilizing Linux platform has the limitations of boot-up time and consuming processing power due to the limitation of battery capacity, to be cost-competitive to minimize the use of memory. In this paper, the real-time operating system(RTOS) is utilized to optimize these portions. MP4 encoder and Muxer are developed to be about ten seconds boot up and minimized memory. It has the advantages of operating at lower power consumption than the Linux utilizing WiFi dongle. Utilizing a WiFi dongle is to provide a progressive download feature on smart phones to lower product prices. But RTOS has the weakness in WiFi. Porting TCP /IP, Web and DHCP server and combination with the USB OTG Host interface by implementing the protocol stack are developed for WiFi. And also SPI NOR flash memory is utilized for faster boot time and cost reductions, low processing power to be consume. As the results, the developed proved the 10 seconds booting time, 24 frame rate/sec. and 10% lower power consumption.

• IE interfaces
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• v.20 no.2
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• pp.227-234
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• 2007

The national product identifier(NPI) currently used in the national product asset management system does not accommodate ISO or EPC standards due to the limitation of tag memory. For this reason, we propose a new NPI which accommodates not only ISO item identification standards but also the memory capacity of ISO tags. First of all, memory structures of ISO/IEC 18000-6C and EPC tags are analyzed from the view point of product identifier structure. Second, ISO/IEC 15459 and EPC identification standards as item identifier structures for the product asset management are analyzed. Third, based on these analyses, the NPI used for the current RFID-based product asset management system is analyzed and its problems are presented. Finally, a new NPI structure is proposed suitable for ISO/IEC 18000-6C and ISO/IEC 15459.

• Smart Structures and Systems
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• v.7 no.5
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• pp.329-348
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• 2011

Large-scale earthquakes pose serious threats to infrastructure causing substantial damage and large residual deformations. Superelastic (SE) Shape-Memory-Alloys (SMAs) are unique alloys with the ability to undergo large deformations, but can recover its original shape upon stress removal. The purpose of this research is to exploit this characteristic of SMAs such that concrete Beam-Column Joints (BCJs) reinforced with SMA bars at the plastic hinge region experience reduced residual deformation at the end of earthquakes. Another objective is to evaluate the seismic performance of SMA Reinforced Concrete BCJs repaired with flowable Structural-Repair-Concrete (SRC). A $\frac{3}{4}$-scale BCJ reinforced with SMA rebars in the plastic-hinge zone was tested under reversed cyclic loading, and subsequently repaired and retested. The joint was selected from an RC building located in the seismic region of western Canada. It was designed and detailed according to the NBCC 2005 and CSA A23.3-04 recommendations. The behaviour under reversed cyclic loading of the original and repaired joints, their load-storey drift, and energy dissipation ability were compared. The results demonstrate that SMA-RC BCJs are able to recover nearly all of their post-yield deformation, requiring a minimum amount of repair, even after a large earthquake, proving to be smart structural elements. It was also shown that the use of SRC to repair damaged BCJs can restore its full capacity.

• The Journal of the Korea institute of electronic communication sciences
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• v.16 no.2
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• pp.329-338
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• 2021

This study predicts the amount of wind power generation for rational operation plan of wind power generation and capacity calculation of ESS. For forecasting, we present a method of predicting wind power generation by combining a physical approach and a statistical approach. The factors of wind power generation are analyzed and variables are selected. By collecting historical data of the selected variables, the amount of wind power generation is predicted using deep learning. The model used is a hybrid model that combines a bidirectional long short term memory (LSTM) and a convolution neural network (CNN) algorithm. To compare the prediction performance, this model is compared with the model and the error which consist of the MLP(:Multi Layer Perceptron) algorithm, The results is presented to evaluate the prediction performance.

• International journal of steel structures
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• v.18 no.4
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• pp.1325-1335
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• 2018

This study dealt with investigating the seismic performance of the smart and shape memory alloy (SMA) and magnets plus rubber-spring (MRS) dampers and their effects on the seismic resistance of multiple-span simply supported bridges. The rubber springs in the MRS dampers were pre-compressed. For this aim, a set of experimental works was performed together with developing nonlinear analytical models to investigate dynamic responses of the bridges subjected to earthquakes. Fragility analysis and probabilistic assessment were conducted to assess the seismic performance for the overall bridge system. Fragility curves were then generated for each model and were compared with those of as-built. Results showed dampers could increase the seismic capacity of bridges. Furthermore, from system fragility curves, use of damper models reduced the seismic vulnerability in comparison to the as-built bridge model. Although the SMA damper showed the best seismic performance, the MRS damper was the most appropriate one for the bridge in that the combination of magnetic friction and pre-compressed rubber springs was cheaper than the shape memory alloy, and had the similar capability of the damper.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.9 no.2
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• pp.49-60
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• 1999

IC 카드의 하드웨어적인 제약으로 대부분의 IC 카드는 대칭키 알고리즘을 사용하고 있지만 IC 카드 하드웨어 제조 기술의 발전으로 앞으로는 보안성이 우수한 비대 칭키 알고리즘이 많이 사용될 것이다. 그리고 IC 카드의 가장 큰 제약적 중 하나는 메모리 용량의 한계이다. 따라서 보안상 안전하면서도 메모리를 적게 사용하는 IC 카드 운영체제의 구현을 중요한 문제이다. 그래서 본 논문에서는 다양한 종류의 키 알고리즘을 수용할 수 있는 키 파일 탐색 기법을 제안하였다. 또한 데이터 파일 헤더에 잠금 필드를 삽입하여 보안성을 향상시켰으며 메모리 사용량을 줄일 수 있도록 데이터 파일 헤더만을 이용한 파일 탐색 기법과 자유 공간 탐색 기법을 제안하였다. Because of the evolution of IC card hardware fabrication technologies IC card will be able to accept asymmetric key encryption algorithm in the future. One of the most restrictive points of IC card is memory capacity. Therefore it is an important problem to design a secure IC card operating system using memory in small. In this paper we proposed a key file search mechanism using a key length field inserted in a key file header structure. The key file search mechanism makes IC card execute any key-based encryption algorithm. In addition we proposed inserting a lock field in data file header structure. The lock field intensifies the security of a data file. Finally we proposed a data file search mechanism and free space search mechanism using only data file header. The file system using these mechanisms spends smaller memory than that using a file description table and record of unallocated space.

• Journal of the Korea Society of Computer and Information
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• v.26 no.2
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• pp.11-18
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• 2021

The flash translation layer(FTL) of SSD maps the logical page number requested from the host to the actual recorded flash memory page number. It is very important to reduce the amount of RAM used to manage the mapping information. In the existing demand-based FTLs, two-level method is applied in which mapping information is also recorded in flash memory pages and only their addresses are managed as a table in RAM. As the capacities of SSDs are growing to tens of terabytes, the amount of RAM for mapping table becomes too large. In this paper, ML-FTL was proposed as a method of managing mapping information in three levels to reduce the amount of RAM required drastically. From an evaluation, the increase in overhead was minimal compared to the conventional two-level method by properly utilizing cache.

• Journal of Positioning, Navigation, and Timing
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• v.12 no.1
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• pp.75-81
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• 2023

In this study, we design an optimized Graphics Processing Unit (GPU)-based GNSS signal processing technique with the goal of designing and implementing a GNSS Software Defined Receiver (SDR) that can operate in real time all-in-view mode under multi-constellation and multi-frequency signal environment. In the proposed structure the correlators of the existing GNSS SDR are processed by the GPU. We designed a memory structure and processing method that can minimize memory access bottlenecks and optimize the GPU memory resource distribution. The designed GNSS SDR can select and operate only the desired GNSS or desired satellite signals by user input. Also, parameters such as the number of quantization bits, sampling rate, and number of signal tracking arms can be selected. The computing capability of the designed GPU-based GNSS SDR was evaluated and it was confirmed that up to 2400 channels can be processed in real time. As a result, the GPU-based GNSS SDR has sufficient performance to operate in real-time all-in-view mode. In future studies, it will be used for more diverse GNSS signal processing and will be applied to multipath effect analysis using more tracking arms.

• IEMEK Journal of Embedded Systems and Applications
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• v.18 no.1
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• pp.31-40
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• 2023

Recent advances in flash technologies, such as 3D processing and multileveling schemes, have successfully increased the flash capacity. Unfortunately, these technology advances significantly degrade flash's reliability due to a smaller cell geometry and a finer-grained cell state control. In this paper, we propose an asymmetric BER-aware reliability optimization technique (aBARO), new flash optimization that improves the flash reliability. To this end, we first reveal that bit errors of 3D NAND flash memory are highly skewed among flash cell states. The proposed aBARO exploits the unique per-state error model in flash cell states by selecting the most error-prone flash states and by forming narrow threshold voltage distributions (for the selected states only). Furthermore, aBARO is applied only when the program time (tPROG) gets shorter when a flash cell becomes aging, thereby keeping the program latency of storage systems unchanged. Our experimental results with real 3D MLC and TLC flash devices show that aBARO can effectively improve flash reliability by mitigating a significant number of bit errors. In addition, aBARO can also reduce the read latency by 40%, on average, by suppressing the read retries.

• Journal of Aerospace System Engineering
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• v.18 no.4
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• pp.89-95
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• 2024

This paper introduces an effective and convenient method for utilizing onboard memory space to process remote commands, telemetry, and interplanetary network protocol data in satellite onboard systems. By enhancing the doubly linked list data structure to store and make accessible variable-length communication protocol data either sequentially or at variable locations, the paper enhances memory capacity utilization. The concept of 'grape' is introduced into the doubly linked list data structure to manage variable-length data and its access, with performance verification conducted through its reference implementation. This novel approach to linked lists is termed 'grape.'