• 대한전자공학회논문지SD
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• 제40권11호
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• pp.37-44
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• 2003

다수의 입력을 필요로 하는 전류모드 Max 회로에서 고주파 왜곡을 효과적으로 억제할 수 있는 trans conductance 조정 방법을 제안하였다. Max 회로에 인가되는 입력 신호의 개수가 증가하면, 기생 커패시턴스는 입력 단의 개수에 비례하여 누적되게 된다. 본 연구에서는 Max 회로의 왜곡 신호의 크기가 누적된 기생 커패시턴스와 출력신호의 변화율에 비례하며, 공통 다이오드결선 트랜지스터의 transconductance 값에 반비례하게 됨을 밝혔다. 왜곡 억제를 위한 효과적인 방안으로 공통 다이오드결선 트랜지스터의 transconductance 값을 최소화하는 방안을 제시하였다. 이 방법의 효용성은 다양한 수의 입력 신호를 갖는 전류모드 Max 회로에 대해서 HSPICE 시뮬레이션을 통해 입증하였다.

• 한국정보통신학회논문지
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• 제26권2호
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• pp.325-328
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• 2022

A convolutional neural network(CNN) is widely used in the computer vision tasks, but its computing power requirement needs a design of a special circuit. Most of the computations in a CNN can be implemented efficiently in a digital circuit, but the SoftMax layer has operations unsuitable for circuit implementation, which are exponential and logarithmic functions. This paper proposes a new method to integrate the exponential and logarithmic tables of the conventional circuits into a single table. The proposed structure accesses a look-up table (LUT) only with a few maximum values, and the LUT has the result value directly. Our proposed method significantly reduces the space complexity of the SoftMax layer circuit implementation. But our resulting circuit is comparable to the original baseline with small degradation in precision.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2000년도 제15차 학술회의논문집
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• pp.513-513
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• 2000

An integrable circuit technique for implementing high-speed analog two-input Max/Min circuit is described. The realization method is suitable for fabrication using CMOS technology. The proposed circuit comprises a current mirror and electronic switch connected with a absolute value circuit. The maximum or minimum operation of the proposed circuit can be selected by an external control voltage. The proposed analog Max/Min circuit has a very sharp transfer characteristic and is suitable for real-time systems. Simulation results verified the circuit performances are agreed with the expected values.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.1053-1056
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• 2003

A distortion suppression technology for employing multiple inputs in 3n+1 type current mode Max circuit is proposed using the adjustment of transconductance. If the number of inputs in current mode Max circuit increases, the high frequency distortion in the output signal grows. In this paper, it has been disclosed that the distortion in the multiple input Max circuit is proportional to sum of parasitic capacitance in input terminals, to the derivative of the output signal and also to the inverse of transconductance of the common diode-connected transistor. The proposed idea is by employing as larger transconductance of the common diode-connected transistor as possible. The effectiveness of the proposed idea has been proved through the HSPICE simulation.

• 한국정보통신학회논문지
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• 제25권2호
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• pp.330-333
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• 2021

In a CNN for image classification, a SoftMax layer is usually placed at the end. The exponentinal and logarithmic operations in the SoftMax layer are not adequate to be implemented in an accelerator circuit. The operations are usually implemented with look-up tables, and the exponential operation can be implemented in an iterative method. This paper proposes a successive approximation method to calculate a logarithm to remove a very large look-up table. By substituing the large table with two very small tables, the circuit can be reduced much. The experimental results show that the 85% area reduction can be reached with a small error degradation.

• 한국산학기술학회논문지
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• 제10권2호
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• pp.248-255
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• 2009

통신시스템에서의 에러의 처리는 매우 중요한 문제로서 비터비 디코더와 같은 에러처리를 위해서 주로 절대값으로 표현하기 때문에 아날로그 절대값 회로가 자주 필요하게 된다. 이 논문에서는 절대값을 정확하게 계산할 수 있는 아날로그 절대값 회로를 제안하였다. 제안한 절대값 회로에는 부호가 반대인 두 신호들을 만든 다음, 이 신호들을 아날로그MAX회로에 인가하여 둘 중 최대값을 출력하게 하는 방법이다. 이 구조를 회로로 구현하기 위해서는 두 개의 입력 신호를 반대방향으로 차를 구하여, 크기는 같고 부호가 다른 두 개의 신호를 만든 다음 이들을 MAX회로의 입력으로 사용하는 회로를 설계하였다. 본 논문에서는 제안한 회로를 Hspice를 이용하여 시뮬레이션을 수행했으며, 그 결과를 제시하였다.

• 대한전자공학회논문지SD
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• 제48권2호
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• pp.67-72
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• 2011

삼중대역(2.3/2.5/3.5GHz) m-WiMAX 시스템의 제작을 위한 8층의 인쇄회로기판을 제작하였다. 고주파 동작시에도 우수한 성능을 확보하기 위하여 저유전율을 사용한 인쇄회로기판을 제작하였다. 또한 시스템 전체의 크기를 축소하기 위하여 수동소자를 삽입시킨 임베디드 인쇄회로기판을 제작하였다. 그 결과 시스템 면적의 9%를 줄일 수 있었다. 제작된 인쇄회로기판을 사용하여 삼중대역 m-WiMAX 시스템이 제작되었으며, 인터넷 연결 테스트를 성공적으로 수행하였다. 개발된 임베디드 인쇄회로기판은 시스템의 면적 축소와 저신호 손실 RF 통신 시스템에 효과적인 대응을 가능하게 할 것이다.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 1992년도 춘계학술대회 논문집
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• pp.354-358
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• 1992

This paper describes a development of high speed fuzzy inference circuit for the industrialprocesses. The hardware fuzzy inference circuit is developed utilizing a hardware fuzzy inference circuit is developed utilizing a DSP and a multiplier and accumulator chip. To enhance the inference speed, the pipeline disign is adopted at the bottleneck and the general Max-Min inference method is slightly modified as Max-max method. As a results, the inference speed is evaluated to be 100 KFLIPS. Owing to this high speed feature, satisfactory application can be attained for complex high speed motion control as well as the control of multi-input multi-output nonlinear system. As an application, the developed fuzzy inference circuit is embedded to a PLC (Porgrammable Logic Controller) for industrial process control. For the fuzzy PLC system, to fascilitate the design of the fuzzy control knowledge such as membership functions, rules, etc., a MS-Windows based GUI (Graphical User Interface) software is developed.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 하계종합학술대회 논문집(4)
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• pp.147-150
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• 2000

Hausdorff distance(HD) commonly used measures for object matching, and calculates the distance between two point set of pixels in two-dimentional binary images without establishing correspondence. And it is realized as the image filter applying the fuzzy. In this paper, the fuzzy hardware realizes in order to construct the image filter applying HD, also, propose as the method for the noise removal using it in the image. MIN-MAX circuit designs the circuit using MAX-PLUS, and the fuzzy HD hardware results are obtained to the simulation. And then, the previous computer simulation is confirmed to the result by using MATLAB.

• Journal of Welding and Joining
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• 제18권6호
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• pp.42-47
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• 2000

The object of this study is to estimate Sn-Ag-Bi-Ga solder alloy as a substitute for Sn-37Pb alloy. For Sn-Ag-Bi-Ga alloys, Ag, Bi and Ga contents are varied. (Ag : 1~5%, Ga : 3%, Bi : 3~6%) Comparing to Sn-37Pb alloy Sn-Ag-Bi-Ga alloys have wider melting temperature range up to max. $18.7^{\circ}C$. With increasing Ag, Bi contents, the wettability of the alloys increased up to max. 6.6 mN. The vickers hardness of the alloys was max. 46.4 Hv. The ultimate tensile stress of the alloys was max. 60.3 MPa and the elongation was max. 1.2%. The joint strength between circuit board and solder was max. 55.5 N and the joint strength between connector and solder was max. 176.1 N. There were no cracks in this alloys after thermal shock test.