• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.1
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• pp.32-37
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• 2007

A DMB CMOS power amplifier (PA) with high efficiency and linearity is present. For this work, a 0.13-um standard CMOS process is employed and all components of the proposed PA are fully integrated into one chop including output matching network and adaptive bias control circuit. To improve the efficiency and linearity simultaneously, an adaptive bias control circuit is adopted along with second harmonic termination circuit at the drain node. The PA is shown a $P_{1dB}$ of 16.64 dBm, power added efficiency (PAE) of 38.31 %, and power gain of 24.64 dB, respectively. The third-order intermodulation (IMD3) and the fifth-order intermodulation (IMD5) have been -24.122 dBc and -37.156 dBc, respectively.

• Journal of IKEEE
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• v.24 no.1
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• pp.368-371
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• 2020

In this paper, we propose a linear tapered slot rectifying antenna for a portable UHF-band RFID system. Since the proposed rectifying antenna does not use a dielectric substrate, the planar antenna is implemented with a thin metal thickness. The rectifier circuit converts input RF power into output DC voltage using a voltage doubler circuit based on two anti-parallel schottky diodes. The rectifying antenna is integrated by the voltage doubler circuit into a linear tapered slot antenna. For conjugate impedance matching of the rectifying circuit and the linear tapered slot antenna, the source-pull method was utilized by adjusting the angle of the tapered slot and the length of the antenna feed line. The proposed antenna prototype has been verified with the electrical and radiation characteristics through RF-DC conversion and far-field radiation test in open space measurement environment. Finally, the proposed antenna is realized to 0.23-wavelength (75 mm) and 0.18-wavelength (60 mm) at 915 MHz center frequency.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.8
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• pp.788-793
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• 2004

This paper proposes new configuration for the dual power amplifier that operates at 5.8 GHz for the wireless LAN and 1.8 GHz for the PCS. It dose not select the input signal but amplify the dual band signals simultaneously. Broadband diplexer is used at the input to separate the dual band signals. Output power of each amplifier is 1 W. The PBG is employed to improve the performance of power amplifier. Generally, the PBG is employed at the end of output matching network. But in this paper, the PBG is employed in the load pull output matching circuit of amplifer to maximize the output power.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.2
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• pp.249-254
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• 2014

We have studied on the possibility of railway stability system using RFID tag. UHF RFID tag was desinged, manufactured and tested. Proposed UHF tag antenna has PIFA type structure and inset feed multi matching technique was attempted for impedance matching of antenna. The impedance bandwidth (VSWR < 3) of the proposed tag antenna covers 917~923 MHz. Measured peak gain is 3.225 dBi and UHF band with an omni-directional radiation pattern. RFID reader and tag installed in motor car and track, respectively. Then, tag recognition rate according to velocity of car (under 45 km/h) represented 100 %.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.12
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• pp.277-284
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• 2012

In this paper, we analyzed various noise in the video stream system that have largely influence on EMI noise. We presented the remedy for these various noises and then designed the wireless video streaming system for a vehicle. To minimize EMI noise, we derived the improvement of noise characteristic from impedance matching, new design of the inner layer of the PCB line design and new design of high-speed data Interfaces. As a result, the final system showed 40[dBuV/m] and 47[dBuV/m] dB in the each regulation band.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.6 s.336
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• pp.1-8
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• 2005

This paper presents a new low-cost fault-based Built-In Self-Test (BIST) scheme and technique for 1.8GHz RF receiver front end. The technique utilizes input impedance matching measurement. The BIST block and RF receiver front end are designed using 0.25m CMOS technology on a single chip. The technique is simple and inexpensive. The overhead of the BIST circuit is approximately $10\%$ of the total area of the RF front end.

• ETRI Journal
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• v.36 no.1
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• pp.116-123
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• 2014

In this paper, a novel unequal broadband out-of-phase power divider (PD) is presented. Double-sided parallel-strip lines (DSPSLs) are employed to achieve an out-of-phase response. Also, an asymmetric dual-band matching structure with two external isolation resistors is utilized to obtain arbitrary unequal power division, in which the resistors are directly grounded for heat sinking. A through ground via (TGV), connecting the top and bottom sides of the DSPSLs, is used to short the isolation components. Additionally, this property can efficiently improve the broadband matching and isolation bandwidths. To investigate the proposed divider in detail, a set of design equations are derived based on the circuit theory and transmission line theory. The theoretical analysis shows that broadband responses can be obtained as proper frequency ratios are adopted. To verify the proposed concept, a sample divider with a power division of 2:1 is demonstrated. The measured results exhibit a broad bandwidth from 1.19 GHz to 2.19 GHz (59.2%) with a return loss better than 10 dB and port isolation of 18 dB.

• International Journal of Contents
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• v.2 no.1
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• pp.29-33
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• 2006

The common-source low noise amplifier(LNA) with inductive degeneration using a genetic algorithm is designed and tested for a down converter in an industrial, scientific and medical (ISM) band application and a wireless broadband internet service (WiBro). The genetic algorithm optimizes the reflection coefficients to be well matched the input and output ports between multistage transistor amplifiers, and it generates low voltage standing wave ratio as well as gain flatness of the amplifier. The stability and the gain flatness of the LNA have been improved by combining the matching circuits and the series feedback microstrip lines with inductive degeneration at common-source port. In the frequency range of ISM band and WiBro application operating at $2.3GHz{\sim}2.5GHz$, the measured power gain and maximum voltage standing wave ratio (VSWR) of the LNA are $41{\pm}0.5dB$ and 1.3, and the noise figure of the LNA is lower than 0.85dB. The above results are agreed well with the theoretical values of the amplifiers.

• Journal of electromagnetic engineering and science
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• v.16 no.1
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• pp.44-51
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• 2016

A commercial $0.25{\mu}m$ GaN process is used to implement 6-18 GHz wideband power amplifier (PA) monolithic microwave integrated circuits (MMICs). GaN HEMTs are advantageous for enhancing RF power due to high breakdown voltages. However, the large-signal models provided by the foundry service cannot guarantee model accuracy up to frequencies close to their maximum oscillation frequency ($F_{max}$). Generally, the optimum output load point of a PA varies severely according to frequency, which creates difficulties in generating watt-level output power through the octave bandwidth. This study overcomes these issues by the development of in-house large-signal models that include a thermal model and by applying distributed L-C output load matching to reactive matched amplifiers. The proposed GaN PAs have successfully accomplished output power over 5 W through the octave bandwidth.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.3
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• pp.312-318
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• 2016

This paper presents a 2-6 GHz GaN HEMT power amplifier monolithic microwave integrated circuit (MMIC) with bridged-T all-pass filters and output-reactance-compensation shorted stubs using the $0.25{\mu}m$ GaN HEMT foundry process that is developed by WIN Semiconductors, Inc. The bridged-T filter is modified to mitigate the bandwidth degradation of impedance matching due to the inherent channel resistance of the transistor, and the shorted stub with a bypass capacitor minimizes the output reactance of the transistor to ease wideband load impedance matching for maximum output power. The fabricated power amplifier MMIC shows a flat linear gain of 20 dB or more, an average output power of 40.1 dBm and a power-added efficiency of 19-26 % in 2 to 6 GHz, which is very useful in applications such as communication jammers and electronic warfare systems.